• 剂中的材料都具有一定的刻蚀速率。

    More often , all of the materials etchant have a finite etch rate.

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  • 衬底预处理采用化学刻蚀和高温处理。

    Chemical etching and high temperature heating were used for pretreatment of substrates.

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  • 分析了检测结果和刻蚀机理。

    The detected results and etching mechanisms are analysed.

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  • 制作采用的是传统的光刻、刻蚀工艺。

    The sensor is fabricated by traditional lithography and etching.

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  • 田纳西河刻蚀着坎伯兰高原的东部边缘。

    The Tennessee River sculpts the east side of the Cumberland Plateau.

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  • 简单介绍了ICP刻蚀系统和刻蚀原理。

    The ICP etching system and principle were introduced.

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  • 随着气体流量的增加,刻蚀速度不断降低。

    With the increase of flow of the gas, the etching rate decreases continually.

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  • 刻蚀工艺的分辨率是图形转移保真度的量度。

    The resolution of an etching process is a measure of the fidelity of pattern transfer.

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  • 刻蚀工艺的分辨率是图形转移保真度的量度。

    The resolution of an etching process is a measure of the fidelity of pattern transfer .

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  • 介绍了一种新的亚微米发射极窗口刻蚀工艺。

    This paper introduces a novel submicron etching technology for emitter window.

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  • 本文介绍微波等离子体刻蚀应用的实验结果。

    In this paper, the result of etching application with microwave plasma will be introduced.

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  • 更精细的刻蚀技术可以孕育更高性能的微芯片,而这仅仅是开始。

    Finer etching begets higher-performing microchips, and that's just a start.

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  • 用电子束刻蚀法在晶片上镀上纳米级铝层形成了电感器。

    Inductors were defined by electron-beam lithography and formed by depositing micron-thick aluminium metal onto the wafers.

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  • 当能刻蚀的材料不存在时,这些物种就具有较长的寿命。

    The species has a long lifetime in the absence of etchable material .

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  • 通常,所有暴露在刻蚀剂中的材料都具有一定的刻蚀速率。

    More often, all of the materials exposed to the etchant have a finite etch rate.

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  • 等离子体低温刻蚀是一种针对高深宽比结构的干法刻蚀技术。

    High aspect ratio structures have been successfully fabricated by plasma cryo-etching on silicon wafers.

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  • 难熔金属和贵金属组合的这一层薄膜使刻蚀成为一个艰巨任务。

    The combination of refractory and noble metals in a single layer makes etching a formidable task.

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  • 对硅的干法刻蚀技术是现代半导体工业中非常重要的一项工艺。

    Dry etching technique of silicon is a very important process in the modern semiconductor industry.

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  • 大多数些湖泊在山谷都呈U形,是上一个冰河时代冰川刻蚀的结果。

    Most of the lakes lie in U-shaped valleys that were carved by glaciers during the last ice age.

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  • 本文以金属刻蚀去胶腔为背景,简述干刻清洗工艺开发和评价过程。

    Based on ash chamber of metal etch this paper describes the full process of dry clean development and evaluation.

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  • 然后在氧等离子体中用电子束刻蚀法去除沟道区石墨烯形成晶体管的沟道。

    They then defined the transistor channel using electron-beam lithography, removing graphene outside of channel regions with an oxygen plasma.

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  • 研究还发现,不同垫层(塑料片、钢片和铝板)导热性能对刻蚀速率影响很小。

    Meanwhile, the difference in thermal conductivity of underlining materials (plastic sheet, steel sheet and aluminium plate) has little effect on the etching rate.

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  • 通过反应离子刻蚀可以将光刻胶微透镜图形转移至这种高性能的聚合物材料上。

    Pattern transfer technique is used to transfer photoresist microlens arrays into the polymer underlayer.

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  • 用该系统检测了仅用CF4作为刻蚀气体刻蚀非晶硅基薄膜的等离子体光发射谱。

    The optical emission spectrum of r. f. plasma during amorphous silicon based film etching in CF4 gas is detected.

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  • 电池片表面无划伤,但对于在制作过程中采用激光刻蚀工艺的电池的边沿刻蚀线除外。

    No scratch allowed, with exception of laser scratched lines for the cells fabricated with laser for edge isolation.

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  • 目前,刻蚀技术已经成为集成电路生产中的标准技术,干法刻蚀设备亦成为关键设备。

    Now etching has be-come the standard technology, and etching equipment is the key equipment in IC production.

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  • 针对刻蚀率随入射能量增加而下降的问题,详细研究了刻蚀羽辉在刻蚀过程中的影响;

    It is found that etching rate decreases with increasing incident fluences, so the influence of plume in the etching process is studied.

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  • 分析了真空压力、射频功率、气体组合及其流量和电极温度对刻蚀速率、刻蚀剖面的影响;

    The dependence of etching rate and profile on the vacuum pressure, RF pow-er, gas composition and flow rate, and electrode temperature is analyzed.

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  • 即缺陷接地结构,它是近年来提出的一种在微波平面电路接地版上刻蚀出非周期形状的结构。

    Defected ground structure (DGS) is a nonperiodic structure proposed in recent years, which means machining various shapes of etching on the ground plane.

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  • 不能采用更短波长的激光进行芯片刻蚀已经限制了(芯片制造商)在硅晶上设计更精细的电路。

    The inability to etch chips with lasers in the shorter wavelengths has limited how precisely they can design circuits on silicon.

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