The realization of mapping a class of nested loop algorithms to linear systolic array is studied.
研究了一类多重循环算法的线性脉动阵列实现。
Implementing large scale of systolic array in FPGA to accelerate pare-wise alignment can improve the efficiency of alignment remarkably.
在FPGA上实现大规模脉动式阵列对双序列比对算法进行加速能够大幅度提高比对的效率。
This structure divides wavefront control calculation into recursive algorithm and convolution algorithm, and maps them to respectively systolic array by using canonical mapping method.
该结构将波前控制算法分为递归运算和卷积运算两部分后，采用规范映射方法将其分别映射到脉动阵列，再将两个阵列链接以实现单路的波前控制运算。
A novel systolic array architccture for computing discrete orthogonal transforms such as DCT, DHT(DWT) and DFT is proposed.
本文提出一种新型计算离散正交变换如DCT、DHT（DWT）和DFT的脉动阵列实现。
A novel systolic array architccture for computing discrete orthogonal transforms such as DCT, DHT(DWT) and DFT is proposed.
本文提出一种新型计算离散正交变换如DCT、DHT（DWT）和DFT的脉动阵列实现。
应用推荐