硬件验证语言（英语：hardware verification language, 缩写为 HVL）是一种用硬件描述语言（HDL）编写、用于电子电路设计验证的编程语言。
它还使用Boogie根据规范来验证汇编语言，并确保它可以与TAL代码和硬件安全地交互。
Boogie is used to verify the assembly language against a specification and guarantees safe interaction with the TAL code and hardware.
通过实践证明，用属性说明语言验证硬件电路是非常有效的验证方法。
By practice proving, the verification of hardware circuits is an effective method in property specification language.
本文简单介绍了VHDL硬件描述语言及其特色，并就高层次综合、高层次仿真及验证等技术的主要功能和特点，作了较为详细的描述。
This paper introduces VHDL and its feature briefly. At meantime, it describes high level synthesis and high level simulation technology in detail.
应用推荐