Two high speed column parallel digital CIS processing systems are proposed for different high speed application, which have the high frame rate of 301400 Frame/s for VGA level CIS.
针对具体的高速应用领域,设计实现了两种不同结构的数字CIS高速列并行处理系统,对于VGA级别,可实现30～1400帧/秒不等的高帧频。
参考来源 - 超高速数字CMOS图像传感器关键技术研究Based on all the study above, a real column parallel single-slope ADC circuit is designed.
在列并行模数转换器理论的研究基础上着手实际电路的设计。
参考来源 - 用于CMOS图像传感器的高精度列并行single·2,447,543篇论文数据，部分数据来源于NoteExpress
在列并行模数转换器理论的研究基础上着手实际电路的设计。
Based on all the study above, a real column parallel single-slope ADC circuit is designed.
设计了一种用于CMOS图像传感器的列并行rsd循环adc。
A column parallel RSD cyclic ADC for CMOS image sensor is designed.
基于CMOS图像传感器应用，针对列并行的单斜模数转换器设计了一种内在精度高、分辨率可调的斜坡发生器ip核。
An intrinsic accuracy, adjustable resolution ramp generator IP core designed for the column single-slope ADC in a CMOS image sensor is presented.
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