在列并行模数转换器理论的研究基础上着手实际电路的设计。
Based on all the study above, a real column parallel single-slope ADC circuit is designed.
基于CMOS图像传感器应用，针对列并行的单斜模数转换器设计了一种内在精度高、分辨率可调的斜坡发生器ip核。
An intrinsic accuracy, adjustable resolution ramp generator IP core designed for the column single-slope ADC in a CMOS image sensor is presented.
DB 2对其涉及传统关系数据和xml列数据的常用服务进行了扩展，例如优化、索引、并行控制和实用工具。
DB2 extends its common services, such as optimization, indexing, concurrency control, and utilities, across the traditional relational and XML column data.
研究了现有的位平面编码VLSI结构，设计了一种条带列与编码通道全并行的VLSI结构，解决了内部存储资源占用率高的问题。
According to the research on the existing VLSI architecture of the bit-plane coding, a new VLSI architecture is proposed in which stripe-column and coding are both implemented in parallel.
一种混合串并行内容可寻址存储器(CAM)包含布置为多个(n)列及多个(M)行的串行CAM单元及并行CAM单元。
A mixed serial-parallel content addressable memory (CAM) includes serial CAM cells and parallel CAM cells that are arranged in multiple (n) columns and multiple (m) rows.
理论分析与数值实验表明，该算法较列扫描并行算法优越。
The theoretical analysis and numerical experiment show that the new algorithm is better than the line-scan algorithm.
在该结构中行变换和列变换是并行进行的，在完成两行的行变换之后就开始进行列变换。
In this architecture, the row transform and the column transform are running simultaneously, that is, the column transform starts immediately after two row transforms have finished.
在该结构中行变换和列变换是并行进行的，在完成两行的行变换之后就开始进行列变换。
In this architecture, the row transform and the column transform are running simultaneously, that is, the column transform starts immediately after two row transforms have finished.
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