The parallel perturbation technique is well-suited to mixed-mode VLSI implementation.

该并行扰动技术非常适合于用混模vlsi实现。

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In this paper, a VLSI implementation method of design-for-testability for DCT is presented.

本文提出了一种离散余弦变换电路VLSI实现的可测试性设计。

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For VLSI implementation, Low operation voltage and switching current are the major concerns.

对于VLSI的实施而言，低的工作电压和转换电流是主要关注的问题。

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