Sampling rate conversion methods of integral ratio, fractional ratio, and NCO controlled positive real ratio are investigated.

文中分析了整数倍、分数倍和NCO控制的正实数倍的采样率变换方法。

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The module is designed for both integral and fractional scaling ratios and utilizes variable filter window for calculating pixels of a scaled image to realize pixel re-sampling.

该模块利用可变大小的窗口滤波插值进行图像像素重采样，能同时适用整数和分数缩放比例的图像缩放。

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The design method for the efficient time-varying network architecture of the fractional multiple sampling rate converter is presented and its field programmable gate array (FPGA) is implemented.

提出了分数倍抽样率转换器的高效时变网络结构的设计方法，并用现场可编程门阵列(FPGA)实现。

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