fractional multiple sampling rate converter
fractional multiple sampling rate converter
分数倍采样率转换器
以上为机器翻译结果，长、整句建议使用 人工翻译 。
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The design method for the efficient time-varying network architecture of the fractional multiple sampling rate converter is presented and its field programmable gate array (FPGA) is implemented.
提出了分数倍抽样率转换器的高效时变网络结构的设计方法，并用现场可编程门阵列(FPGA)实现。
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