gate-drain overlapped LDD 栅漏交叠轻掺杂漏
gate-drain overlapped device 栅漏交叠器件
Gate Drain 栅漏
gate-drain voltage 栅漏电压
a gate-drain voltage 栅漏电压
The device used new "building blocks" mesa structure, which reduced gate-drain feedback capacitance.
器件采用了新的“积木式”台面结构，减小了栅-漏反馈电容。
The MOS model used includes short-channel effects, gate-source capacitance, gate-drain capacitance, and output resistance.
使用的MOS管模型考虑了短沟道效应、栅源电容、栅漏电容和输出电阻。
The measurement has shown that the devices have higher associated gain, higher gate-drain breakdown voltage and lower noise figure.
测试表明，器件具有高增益、高栅-漏击穿及低噪声特性。
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