Bit synchronous clock recover circuit is the key part of the communication system, it can exactly recover the synchronous signal from input data stream.
位同步时钟信号的提取是通信系统中的关键部分，应用数字锁相环可以准确地从输入码流中提取出位同步信号。
The maximum peak-to-peak value of the timing variations in synchronous data expressed as a percentage of the ideal bit period.
在以理想的位周期的百分数表示的同步数据里，用以表示两个峰值间的最大定时变化值。
The digital realization of monostable circuit and extraction of bit-synchronous signal with digital phase lock loop are also introduced in detail.
对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。
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