静态时序分析的实现。
静态时序分析是一种彻底的分析、调试、验证设计的方法。
Static timing analysis is an exhaustive method of analyzing, debugging and validating design performance.
因为运行时候可能长达良多个小时，静态时序分析已经成为良多ic设计团队的瓶颈。
Because run time may is as long as, make many hours, static sequential analysis has become a lot of IC to design the bottleneck of the group.
文章在静态时序分析的基础上，提出了一种利用关键路径时延信息提高FPGA分割效率的方法。
In this paper, on the basis of static timing analysis, a new method is employed to enhance the efficiency of FPGA partition by extracting the information of critical path-delay.
参与并完成了X微处理器全芯片的静态时序分析工作，对电路的关键路径等重要信息进行了详细分析。
We accomplished the full-chip static timing analysis of X microprocessor, and made a detailed analysis such as critical-path checking in the circuit.
静态时序分析由于速度快和容量大而广泛应用于时序验证，而门延时的计算则是静态时序分析中的关键部分。
Static timing analysis is widely applied in timing verification because of its high speed and great capacity. The gate delay computing is a critical part of static timing analysis.
首先，文章讨论了静态时序分析中的伪路径问题以及路径敏化算法，分析了影响逻辑门和互连线延时的因素。
Firstly, false paths in static timing analysis and the algorithm to sensitize paths are presented, and then some factors affecting gates and interconnects delay are discussed.
最后利用FPGA平台实现了BIST的功能和时序验证，并通过综合、静态时序分析、自动布局布线实现了BIST系统的版图设计。
Finally USES FPGA platform for BIST functions and timing verification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.
负责带领整个团队实施芯片的综合、静态时序分析、逻辑一致性分析、后仿真、DFT、ATE、功耗控制。从芯片实现的角度对模块的RTL代码和芯片的RTL代码进行把关。
Lead ASIC frond-end design team to complete Synthesis, STA, Equivelant Check, Post Layout Simulation, DFT, ATE, Power Control. Make sure RTL code is ok for chip implement.
蜂窝客户管理系统利用UM L类图建立了系统静态模型，并对蜂窝定义与划分模块使用用例图进行需求分析和用时序图来完成动态模型的建立。
Beehive Customer Management System used UML class diagram to build static model, used use case diagram to analyze requirement and used sequence diagram to build dynamic model.
蜂窝客户管理系统利用UM L类图建立了系统静态模型，并对蜂窝定义与划分模块使用用例图进行需求分析和用时序图来完成动态模型的建立。
Beehive Customer Management System used UML class diagram to build static model, used use case diagram to analyze requirement and used sequence diagram to build dynamic model.
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