漏区包含一交替掺杂形态区域。
The drain region includes an alternating-doping profile region.
晶体管包含一栅结构、一源区和一漏区。
The transistor may include a gate structure, a source region, and a drain region.
源区和漏区形成在鳍部内栅极的相对侧处。
A source region and a drain region are formed in the fin at the opposite sides of the gate electrode.
在半导体中的源极区和漏极区可以限定晶体管栅极长度。
Source and drain regions in the semiconductor may define a transistor gate length.
浮动栅极定位于源极区与漏极区之间。
The floating gate is positioned between the source and drain regions.
各种MOSFET测试都要求进行弱电流的测量。这些测试包括栅极漏电、泄漏电流与温度的关系、衬底对漏极的漏电和亚阈区电流等。
Various MOSFET tests require making low current measurements. Some of these tests include gate leakage, leakage current vs. temperature, substrate to-drain leakage, and sub-threshold current.
结论经鼻蝶入路显微手术为鞍区病变术中和术后预防和修补脑脊液鼻漏的良好方法。
Conclusion Transsphenoidal microsurgical approach is a good method for the treatment of perioperative cerebrospinal rhinorrhea in sellar lesions.
在岛区受到的静电力的表达式中，除了包括漏源电极的作用外，还考虑了双栅电极和系统初始电容值的影响。
The expression of the electrostatic force which drives the island considers the function of the gate electrodes and the initial capacitances besides the effect of the drain-source electrode.
该晶体管还包括第一导电类型的漏极区，该漏 极区与不同于第一半导体区的第二半导体区电连通。
The transistor also comprises a drain region of the first conductivity type and electrically communicating with a second semiconductor region that differs from the first semiconductor region.
主要阐述了路基漏压区形成的原因，分析了路基漏压区的危害性，并从施工控制和工程管理角度详述了消除漏压区应采取的措施。
The paper mainly introduced the shape cause of subgrade seepage zone, analyzed its hazard and discussed its countermeasures from construction control and management.
从而避免了传统电镀锌板直接焊接成型油箱内表面漏镀、焊缝及热影响区锌层烧损等缺陷。
It can also avoid pretermission of plating, burnout of zinc layer on weld beam and heat affected zone, and other limitations on the inner surface of fuel tank made of galvanized sheet.
针对“漏桶”模型提出了一种改进方法，其基本思想是通过增加输入数据缓冲区，来降低信元丢失率。
The paper proposes an improvement of Leaky Bucket Technique. The basic idea is to decrease the cell losing ratio by adding an input buffer.
在所述源和漏的一部分蚀刻凹槽区。
Recessed regions are etched in a portion of the source and drain.
对粘性与无粘结果的比较显示，由泄漏流所产生的激波后阻塞区是由激波-漏流干扰所致，粘性的作用将削弱其面积和强度。
The comparison between the viscous and non-viscous simulations shows that the intensive blockage area is caused by shock-leakage flow interaction.
在一种可替代的电路中，每个负载器件(M3,M4)的衬底都与它的漏极相连，并且被偏置在弱反型区工作。
In an alternative circuit, each load device (M3, M4) has its bulk connected to its drain and is biased to operate in the weak inversion regime.
虚拟存储单元行包括第二导电型源极区和第二导电型漏极区。
The virtual storage unit line comprises a second conduction type source electrode region and a second conduction type drain electrode region.
虚拟存储单元行包括第二导电型源极区和第二导电型漏极区。
The virtual storage unit line comprises a second conduction type source electrode region and a second conduction type drain electrode region.
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