This Act may be called the Semiconductor Integrated Circuits Layout-Design Act, 2000.
该法被称为《2000年半导体集成电路布图设计法》。
The utility model can protect the film from pollution and increases the printing quality of photolithography during the production of semiconductor integrated circuits.
本实用新型可保护薄膜不受污染，提高半导体集成电路生产过程中的照相平版印刷质量。
All of the currents (in virtually all integrated circuits) are confined to a very thin region near one face of a semiconductor crystal.
所有的电流(在所有的集成电路中)实际上局限于靠近半导体晶体面非常薄的区域内。
Semiconductor diodes bipolar junction transistors field-effect transistors transistor amplifiers frequency response operational amplifiers differential and multistage amplifiers integrated circuits.
半导体、二极体、双极电晶体、场效电晶体、电晶体放大器、频率响应、算放大器、差动及多极放大器、积体电路。
Semiconductor devices. Discrete devices and integrated circuits. Part 8: field-effect transistors.
半导体器件。分立器件和集成电路。第8部分：场效应晶体管。
Owing to their specialized structures and minute diameter, it can be utilized as a sensor device, semiconductor, or for components of integrated circuits.
由于他们特殊的结构和微小的直径，可以被用于传感器装置、半导体或者集成电路的组件中。
Digital logic gate circuits are manufactured as integrated circuits: all the constituent transistors and resistors built on a single piece of semiconductor material.
数字逻辑门电路作为集成电路被制造：所有组成的晶体管和电阻建立在一块半导体材料上。
The invention relates to the production of multilayered dielectric structures and to semiconductor devices and integrated circuits comprising these structures.
本发明涉及多层介电结构的生产并涉及包含这些结构的半导体设备和集成电路。
Semiconductor devices. Integrated circuits. Part 20: Generic specification for film integrated circuits and hybrid film integrated circuits.
半导体器件。集成电路。第20部分：薄膜集成电路及混合薄膜集成电路的总规范。
Semiconductor devices. Integrated circuits... Part 3: Analogue integrated circuits.
半导体器件。集成电路。第3部分：模拟集成电路。
A full wave analysis of lossy interconnection lines on doped semiconductor substrates in high speed integrated circuits is carried out by means of a finite difference time domain (FDTD) approach.
本文首次利用时域有限差分(FDTD)法分析了高速集成电路芯片内半导体基片上的有耗互连传输线的电特性。
A full wave analysis of lossy interconnection lines on doped semiconductor substrates in high speed integrated circuits is carried out by means of a finite difference time domain (FDTD) approach.
本文首次利用时域有限差分(FDTD)法分析了高速集成电路芯片内半导体基片上的有耗互连传输线的电特性。
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