The leakage power issue is challenging high-performance microprocessor design, especially as feature size shrinks.
随着工艺尺寸的缩小，漏流功耗逐渐成为制约微处理器设计的主要因素之一。
With the rapid development of microelectronics, the feature size of semiconductor devices is becoming smaller and smaller as predicted by Moore's Law.
随着微电子技术的飞速发展，半导体器件的特征尺寸按摩尔定律不断缩小。
As the technology is making progress rapidly in microelectronics, the feature size has reduced below 130nm, and the 65nm process has been in practical use.
微电子技术飞速进步，工艺特征尺寸已经减小到了130纳米以下，65纳米工艺已成为成熟工艺。
As feature size shrinks, especially with the use of resolution enhancement techniques, accurate measurement of image quality parameters in situ is indispensable for the lithographic tools.
随着光刻特征尺寸的不断减小，尤其是随着分辨力增强技术的使用，像质参数的原位检测已成为先进的投影光刻机中不可或缺的功能。
Nanoimprint, as a non-optical lithography technology , has demonstrated its ability for semiconductor manufacturing by offering resolution below sub-10nm feature size, high throughput and low cost.
纳米压印作为非光学的下一代光刻技术，具有分辨率高、成本低、产率高等诸多优点，因而可能应用于将来的半导体制造中。
The minimum feature size for printing with SLS Nylon is 1 mm.
使用SLS尼龙打印的最小特征尺寸为1毫米。
Problem: Wavelength has been scaling at a slower rate than the IC feature size.
问题：光学波长微缩的速度跟不上IC尺寸微缩的速度。
In this paper, micro vision was used to make measurements on the feature size of photomask.
利用显微视觉技术对光掩模的特征尺寸进行了测量。
Then the smaller feature size of spout holes is achieved by micro-EDM with layer-by-layer scan machining.
型孔喷口的最小特征尺寸采用微细电火花逐层扫描加工得到。
With the rapid development of microelectronics industry, the feature size of CMOS device is scaling down.
随着微电子工业的飞速发展，CMOS器件特征尺寸在不断缩小。
With the advent of the era of deep sub-micron IC, the feature size on the IC chip is shrunk to nanometers.
伴随着深亚微米集成电路时代的来临，芯片的特征尺寸已经缩小到纳米尺度。
So the measurement and control in the feature size of photomask can reduce the reject of IC and research on this area is very meaningful.
对掩模特征尺寸及缺陷进行检测可以减少集成电路的废品率，因此开展这方面的研究具有重要意义。
As the IC feature size continues to decrease, interconnect cross-talk noise with the process fluctuation is also a corresponding increase in sensitivity.
随着集成电路特征尺寸的不断减小，互连线的串扰噪声对工艺波动的灵敏度也在相应增加。
The issue of interconnect capacitance rising from very large scale integration(VLSI)with a decreased feature size and increased number of wiring layers is described.
阐述了超大规模集成电路（ VLSI）特征尺寸的减小及互连线层数增加引起的互连线电容增加的问题。
The ever-smaller feature size of integrated circuit imposes on increasingly stringent requirements on the defect control and internal gettering(IG)capability of Czochralski(CZ)silicon wafers.
集成电路特征线宽的不断减小对直拉（CZ）单晶硅片中的缺陷控制和内吸杂技术提出了愈来愈高的要求。
The community feature, size-class structure, the regulation of changing density were analyzed and the survival curve, the death curve and the life table were worked out.
分析了白皮松的群落学特征、径级结构及其密度变化规律；绘制了存活曲线和死亡曲线，从多角度研究了白皮松幼林种群的动态变化规律。
The community feature, size-class structure, the regulation of changing density were analyzed and the survival curve, the death curve and the life table were worked out.
分析了白皮松的群落学特征、径级结构及其密度变化规律；绘制了存活曲线和死亡曲线，从多角度研究了白皮松幼林种群的动态变化规律。
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