The algorithm presented in the paper achieved the stable condition and region of 2st-order DDLL. All of these analyses results are very important to design applicable parameters of the loop.
本文分析了一种非相干伪码跟踪环路的线性以及非线性跟踪性能,并得到了环路的收敛域与收敛条件,这些分析结果对环路参数的设计都是至关重要的。
The algorithm presented in the paper achieved the stable condition and region of 2st-order DDLL. All of these analyses results are very important to design applicable parameters of the loop.
本文分析了一种非相干伪码跟踪环路的线性以及非线性跟踪性能,并得到了环路的收敛域与收敛条件,这些分析结果对环路参数的设计都是至关重要的。
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