The whole design is described in VHDL. By logic optimization, the controller has an advantage of less resource utilization and less clock delay compared with other similar controllers.
整个设计采用VHDL语言描述，经过逻辑优化，该显示控制器有着比同类控制器占用资源少、时钟延迟小等优点。
This paper introduces the functions and work principles of serial clock chip DS1302, the design of interface circuit with AT89C51 single -chip microcomputer in the spray irrigation controller.
本文介绍了串行时钟芯片DS1302的功能和工作原理，并给出ds1302在灌溉控制器中与AT 89 C51单片机的接口电路设计。
Secondly, controller design of NCS for delay compensation is studied when the controller is clock-driven.
其次，研究了控制器为事件驱动时网络控制系统的时延补偿控制。
A new smoothness tester has been designed and accomplished. This paper presents in details the module design of controller, data acquisition, man-machine interface and real clock.
设计了一种新型平滑度仪，详细描述了控制器、数据采集、人机接口和实时时钟等模块的具体选型及设计；
Controller MCU clock assembly language source code. Platform for IAR.
msp430单片机汇编语言时钟源程序。平台为iar。
This text is mainly to introduce a method of making the multi-functional digital clock with Single-Chip Microcomputer AT89C51 as the center controller.
本设计基于单片机技术原理，以单片机芯片AT89C51作为核心控制器，通过硬件电路的制作以及软件程序的编制，设计制作出一个多功能数字时钟系统。
The hardware of the monitoring system mainly consists of the DSP controller, nonvolatile memory, LED, clock management, keyboard interface, SCI communication units and CAN communication units.
系统的硬件部分主要包括了DSP微处理器的基本外围电路、非易失性存储、LED显示、时钟管理、键盘接口，以及SCI通信和CAN通信等单元电路。
The controller also has real-time clock that can be set and modified.
具有实时时钟，并可以实现时钟的设定和修改。
An administrator is configuring the clock tolerance for the Single Sign-On token configuration policy and wants to define the time skew tolerance between a client and the domain controller clock.
管理员正在配置sso令牌配置策略的时钟容差，想要定义客户端和域控时钟之间的时间斜公差。
An administrator is configuring the clock tolerance for the Single Sign-On token configuration policy and wants to define the time skew tolerance between a client and the domain controller clock.
管理员正在配置sso令牌配置策略的时钟容差，想要定义客户端和域控时钟之间的时间斜公差。
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