The whole design is described in VHDL. By logic optimization, the controller has an advantage of less resource utilization and less clock delay compared with other similar controllers.

整个设计采用VHDL语言描述，经过逻辑优化，该显示控制器有着比同类控制器占用资源少、时钟延迟小等优点。

youdao

This paper introduces the functions and work principles of serial clock chip DS1302, the design of interface circuit with AT89C51 single -chip microcomputer in the spray irrigation controller.

本文介绍了串行时钟芯片DS1302的功能和工作原理，并给出ds1302在灌溉控制器中与AT 89 C 51单片机的接口电路设计。

youdao

Secondly, controller design of NCS for delay compensation is studied when the controller is clock-driven.

其次，研究了控制器为事件驱动时网络控制系统的时延补偿控制。

youdao