第二掺杂区域耦接至第二源极。
你右边的门是通往源极挽救锡安的。
The door to your right leads to the source, and the salvation of Zion.
浮动栅极定位于源极区与漏极区之间。
The floating gate is positioned between the source and drain regions.
源极线和位线是浮动的。
显示器具有一源极驱动器以及至少一像素单元。
The display device comprises a source electrode driver and at least one pixel unit.
一种输出缓冲器及适于显示面板的源极驱动器。
An output buffer and a source driver for a display panel are provided.
本发明涉及一种锁存器及液晶显示源极驱动装置。
The invention relates to a flip latch and a liquid crystal display source drive device.
相应地，该晶体管的阈值电压及栅源极电压也可降低。
Accordingly, threshold voltage as well as voltage of grid and source pole of the transistor also can be lowered.
硬开关(图26所示)几乎不考虑漏源极电压的最小值。
The hard switching approach (as shown in Fig. 26) doesn't consider the minimum drain-source voltage.
图20描述了漏源极电压主要原理产生的电磁干扰频谱。
The spectra of the main elements of the drain-source voltage can be found in Fig. 20.
在半导体中的源极区和漏极区可以限定晶体管栅极长度。
Source and drain regions in the semiconductor may define a transistor gate length.
把这些原理按时序整合呈现出图16所示的典型漏源极电压。
The superposition of all these elements results in a typical drain-source voltage shown in Fig. 16.
当由栅极施加的电流足够强的时候，电子会在源极和栅极之间进行流动。
When the current applied by the gate is high enough, electrons flow through the channel between the source and drain electrodes.
虚拟存储单元行包括第二导电型源极区和第二导电型漏极区。
The virtual storage unit line comprises a second conduction type source electrode region and a second conduction type drain electrode region.
这是通过一个集成的控制一个功率MOSFET 的源极跟随。
This is done with an integrator which controls a power MOSFET as source follower.
这里有两条理由可以解释800伏特漏源极电压波形的两个差异。
This can be explained by two major differences of the 800v drain-source voltage waveform.
降低漏源极直流母线电压影响干扰信号按傅立叶展开式的全部频带。
The decrease of the drain-source voltage or bus voltage affects the entire spectrum evenly according to Fourier theory.
该分频器采用源极耦合场效应管逻辑电路，基本结构与T触发器相同。
The divider is designed in the Source Coupled Logic, with the structure being similar to the t filp flop.
为了适应高速度的要求，所有电路全都采用源极耦合场效应管逻辑来实现。
In order to meet with the requirements of high-speed, the source coupled FET logic (SCFL) is applied in all of the circuits.
所述源极区域及漏极区域包括由肖特基结和P-N结混合形成的半导体结。
The source region and the drain region comprise a semiconductor junction mixedly formed by a Schottky junction and a P-N junction.
结果表明，随着工件阴极电压、源极电压和气压的增加，等离子体密度增大。
It is shown that the plasma density increases with increasing workpiece voltage, source voltage and gas pressure.
该金属氧化物层可以在该沟道层与该源极和该漏极之间具有渐变的金属含量。
The metal oxide layer may have a gradually changing metal content between the channel layer and the source and the drain.
核心电路采用非平衡源极耦合对结构作为整流器，具有良好的全波整流功能；
The main architecture of the circuit adopts the unbalanced source-coupled pairs for rectifier, which shows a good performance in full-wave rectifying;
其它硅化物层(50.4 - 50.6)处于源极、漏极和多晶硅栅极的顶部。
Other silicide layers (50.4-50.6) are on the tops of the source, drain and polysilicon gate.
漏源极电压（图28）在反射过程结束后并减小到100伏特时场效应晶体管导通。
The drain-source voltage (Fig. 28) starts oscillating at the end of the flyback phase and reaching the minimum of 100V when the MOSFET turns on.
该可编程增益放大器采用源极反馈电阻可变的差分放大器结构，且带有直流漂移校正电路。
The PGA consists of the differential amplifier with variable source degeneration resistor and the DC-offset correction circuit.
电路采用源极耦合场效应管逻辑（SCFL），与静态CMOS逻辑相比具有更高的速度。
SCFL circuits are used because of the higher speed compared to static CMOS.
该电路应用两级差动放大增加电路增益，利用源极跟随器作为电压缓冲器以减少信号电平损失。
It uses tow-stage differential amplifiuers to increasee the circuit gain and uses a source follower as a voltage buffer to decrease signal volt- age losing.
该电路应用两级差动放大增加电路增益，利用源极跟随器作为电压缓冲器以减少信号电平损失。
It uses tow-stage differential amplifiuers to increasee the circuit gain and uses a source follower as a voltage buffer to decrease signal volt- age losing.
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