"It's a huge challenge for them," said Dan Hutcheson an analyst at VLSI Research.
“这对他们将是一个巨大的挑战，”VLSI研发部的分析师Dan Hutcheson说。
This paper proposes a VLSI architecture of multilevel filter.
提出了一种多级滤波器的VLSI硬件实现结构。
The characteristic model of interconnects in VLSI is proposed.
本文提出了大规模集成电路中互连线的特征模型。
The VLSI testing is being pushed to the high-level based technology.
VLSI集成电路芯片测试技术正在向高层次测试推进。
In VLSI design flow, design rule checking (DRC) is an important step.
集成电路(VLSI)设计流程中，设计规则检查(DRC)是关键一环。
This paper presents a VLSI multi-layer area detailed routing algorithm.
提出了一个VLSI版图设计的多层区域详细布线算法。
Now, the design and manufacture technology of VLSI have been perfected.
当代超大规模集成电路设计与制造技术日趋成熟。
Low power design is playing a more and more important role in VLSI nowadays.
低功耗设计在当前超大规模集成电路中越来越重要。
The parallel perturbation technique is well-suited to mixed-mode VLSI implementation.
该并行扰动技术非常适合于用混模vlsi实现。
VLSI partitioning is an effective method for reducing complexity of VLSI circuit design.
电路划分是降低超大规模集成电路设计复杂性的有效方法。
In this paper, a VLSI implementation method of design-for-testability for DCT is presented.
本文提出了一种离散余弦变换电路VLSI实现的可测试性设计。
It is a very high speed VLSI Design through the pipeline architecture with power optimization.
该设计采用流水线处理结构，能达到非常快的处理速度，同时进行了功耗优化。
Two-layer channel routing is one of the key steps in the automatic layout design of VLSI chips.
两层通道布线问题在超大规模集成电路自动布图设计中是关键步骤之一。
The storage of neural network weight is an important problem of VLSI implementation to be solved.
神经网络的权值存储是集成电路实现技术中涵待解决的重要问题。
The design of the hardware that used the VLSI technique and the software are introduced in details.
详细介绍了实现协议所采用的VLSI技术的硬件设计和与之相配合的软件设计。
VLSI layout circuit extraction provides a reliable tool for the estimation of circuit's performance.
集成电路版图提取为精确估计电路性能提供了可靠的手段。
The proposed digital realization is simple and modular in structure, suitable for VLSI implementations.
该数字实现结构上简单且模块化，适合VLSI实现。
The traditional magnitude comparator is based on gate-level techniques and not suitable for VLSI design.
传统的数字比较器采用门级设计技术，电路结构不规则，不利于大规模集成电路的设计。
The application of ANSYS to the geometrical optimization of VLSI interconnect is introduced in this paper.
介绍了ANSYS程序在VLSI互连几何最佳化设计中的初步应用。
Electromigration in metal thin film interconnection is one of the important problems for VLSI reliability.
金属薄膜互连的电迁移现象是VLSI最重要的可靠性问题之一。
These strategies based on the graph theory have theoretic and practical significance in the design of VLSI.
这些策略均以图论为基础，对VLSI布图设计具有一定的理论和实用意义。
Two main aspects in VLSI testing, fault simulation and test generation, are researched in this dissertation.
本文对VLSI测试中的两个主要问题—故障模拟和测试产生进行了深入的分析和研究。
A 32kb Static Random Access Memory (SRAM), which is widely used at present in VLSI, is designed in this paper.
目前，片上集成存储器一般采用静态结构，本文设计了一款32KB容量的静态随机存储器(SRAM)。
CMOS technics is mainstream technics in VLSI, which owes high integration and integrates many functions into one chip.
CMOS工艺是超大规模集成电路的主流工艺，集成度高，可以根据需要将多种功能集成在一块芯片上。
Under this background the dissertation is intended to develop some algorithms for VLSI physical design detailed routing.
本文正是在这样的背景下对VLSI电路物理设计中的详细布线问题展开了一些研究工作。
The placement problem is an important problem in VLSI layout design, but results from traditional methods are not satisfied.
布局问题是VLSI布图设计中的重要问题，传统的方法很难得到满意的解答。
At first, this thesis introduces the VLSI physical design process, based on this leads to the rectilinear Steiner tree problem.
本文首先介绍了超大规模集成电路的物理设计流程，在此基础上引出直角斯坦纳树问题。
The results show that this method is very fit for the computer aided analysis of on chip interconnects for the high speed VLSI.
分析结果表明，该方法很适合高速集成电路芯片内互连线的计算机辅助分析。
From the introduction of design process of every module circuit, we can see easily some general feature of VLSI design with HDL.
通过对各个模块设计过程的介绍，阐明了使用HDL语言设计超大规模集成电路的一般特点。
From the introduction of design process of every module circuit, we can see easily some general feature of VLSI design with HDL.
通过对各个模块设计过程的介绍，阐明了使用HDL语言设计超大规模集成电路的一般特点。
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