The clock frequency is 1 MHz. The device samples sensor-read data during the write operation.
时钟频率为1兆赫。在写操作的过程中，设备从传感器独处的数据总取样。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
这是因为进程执行现在需要跨总线协调，以一半的芯片时钟频率进行处理。
Suppose that Enable is high, the counter counts up every clock cycle, and the frequency of the PWM output is the clock frequency divided by 2 count bits.
假设高信号使能，计数器每个时钟周期进行计数，PWM输出的频率为时钟频率的2次幂分频。
Therefore, the clock frequency directly affect the speed of MCU, clocking circuit and the quality of directly influence the stability of single-chip microcomputer system.
因此，时钟频率直接影响单片机的速度，时钟电路的质量也直接影响单片机系统的稳定性。
The higher the clock frequency is, the more PLL influences the performance of microprocessors. PLL technique has been one of the core techniques in modern microprocessor design.
随着时钟频率的不断提高，微处理器的性能受锁相环的影响越来越大，锁相环技术已经成为当代微处理器的核心技术之一。
The capacity and speed of the memory subsystem in this architecture can be improved using the existed memory devices while the cost can be downgraded without enhancement of the clock frequency.
该结构可利用现有存储器件在不增加时钟频率的情况下，提高存储器系统的容量和速度，同时降低成本。
The clock measures the passage of time in millionths of a second by counting the frequency of electromagnetic waves.
这种钟表通过电磁波的频率来计算时间，单位为百万分之一秒。
It displays everything from the CPU clock and technology to ram frequency, BIOS and Windows version, license information for installed programs and a lot more.
它可以显示很多内容，从CPU时钟频率和技术到RAM频率、BIOS和Windows版本、已安装软件的授权信息等等。
C1E tries to provide more power savings than the traditional C1 state (which only halts the clock signal) by also lowering the voltage and frequency.
同样通过降低电压和频率，C1E尝试比传统C1状态(只会停止时钟信号)提供更大的电能节省。
The heated ion vibrates at a slightly different frequency, making the clock a little less accurate.
受热的离子振动频率细小的差别，使得时钟有点不准确。
The numbered, it reflects various characteristics such as smoothness of engraving, the amount of memory cache, frequency of buses required, or clock speed.
编号的，它反映了不同的特色，如光滑的雕刻，金额内存高速缓存，频率巴士的要求，或者时钟速度。
This is the basis for the well - known cesium clock, presently the standard of frequency and time.
这就是众所周知的铯原子钟的基础，它是目前的频率和时间基准。
The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability .
高频时钟可支持更高的取样率，从而达到更高的精确度和更快的信号处理能力。
This makes possible to control the plural flows of data even with the considerable increase for clock frequency.
这使得能够控制复数流动的数据，甚至与相当的增加时钟频率。
The trick is to use a clocked DLL, which not only minimizes clock skews, but also offers a double-frequency output clock.
关键是为了使用时钟DLL，它不只是最小化时钟脉冲相位差，还提供双倍输出的时钟频率。
The frequency synchronization and sampling clock synchronization technique in high definition TV (HDTV) are investigated.
研究了高清晰度数字电视(HDTV)中的频率同步及采样钟同步技术。
This article mainly addresses the maintenance period of clock frequency of SPC exchanges in China's telecommunication network.
本文主要讨论我国电信网中程控交换局时钟频率维护周期的确定问题。
And the selection and design of switch-in module, switch-out module, communication module, clock module, data storage module, keys module and frequency detecting module are also discussed.
论文中还给出了开关量输入、开关量输出、通信模块、时钟电路、数据存储器、按键电路和频率跟踪电路等各功能模块的选择方法和设计原理。
We describe the synchronization technique in several keys including symbol timing, carrier frequency offset estimation and sampling clock offset estimation.
符号定时同步技术，载波频率同步技术和采样钟同步技术等几个方面。
Clock Tree Synthesis is important in the backend-end design of chip design, and the clock skew has become the major part of constraints that limit system clock frequency.
时钟树综合是芯片后端设计至关重要的一环，时钟偏差成为限制系统时钟频率的主要因素。
A new tool that can test the clock base frequency error of energy measuring devices and provide GPS standard time to calibrate real-time clock was introduced in this paper.
介绍了一种用来测量电能计量装置的时钟基频误差，并提供GPS标准时间以校准其实时时钟的新型工具。
The system based on the frequency synthesizer can offer a high accuracy, high stability and low jitter clock for a high speed and high precision backplane test platform.
该时钟板基于频率合成器来产生高精度、高稳定度、低抖动的时钟，用于高速高精度背板测试平台。
This paper introduces the frequency deviations of NIM4 Cesium fountain clock , the method and result of a new evaluation.
详细介绍NIM4铯喷泉钟系统频移及其不确定度的最新评定方法和结果。
A novel all optical scheme for extracting clock pulses with basic frequency from the receiving non uniform OTDM optical signal is proposed.
提出从接收到的光信号脉冲串中提取光基频时钟的方案。
The external clock frequency applied to the AD7764 determines the sample rate, filter corner frequencies, and output word rate.
AD7764的采样速率、滤波器转折频率和输出字速率由外部时钟频率决定。
A frequency comparator compares the frequency of a reference clock with that of an output clock and outputs a frequency comparison signal.
频率比较器比较基准时钟和输出时钟的频率，并输出频率比较信号。
The clock offset and frequency drift rate for sensor nodes are estimated and then compensated by using the time-stamp recorded in two adjacent synchronizations.
该算法利用连续两次同步过程中所记录的时间信息来估算节点时钟的偏移和频率漂移率，并进行补偿。
The clock offset and frequency drift rate for sensor nodes are estimated and then compensated by using the time-stamp recorded in two adjacent synchronizations.
该算法利用连续两次同步过程中所记录的时间信息来估算节点时钟的偏移和频率漂移率，并进行补偿。
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