A simple, modular, extensible and portable SDRAM controller program is proposed.
提出一种简便、模块化、易扩展和可移植的SDRAM控制器方案。
While its time sequence and access mechanisms are very complex, it is necessary to design SDRAM controller to improve the efficiency of accessing.
但SDRAM的控制时序和机制较复杂，因此需要设计sdram控制器以提高其读写效率。
We design a simple SDRAM controller in FPGA to interface with SDRAM, its main tasks are initialization, periodic refreshing, continuous reading and writing.
并在FPGA中实现了一个简化的SDRAM控制器，用以完成对SDRAM的初始化、定时刷新、连续读写等功能。
This paper based on the mechanism of DDR-SDRAM, gave a way to construct a DDR-SDRAM controller based on WISHBONE bus protocol, and also introduced a forecast method to improve DDR's performance.
SDRAM是当今一种流行的高速存储器。通过和普通sdram存储器对比，阐述了WISHBONE总线协议下ddr存储器控制器的设计方法和注意事项，并提出一种提高DDR工作效率的预测机制。
Structure and work principle of SDRAM chip (MT48LC16M16A2TG-75IT) is analyzed. Internal architecture and workflow of SDRAM controller is confirmed. Furthermore, its control and data path is designed.
分析了SDRAM芯片(MT 48lc16 M 16a2tg- 75it)的结构和工作原理，确定了内存sdram控制器的内部结构和工作流程，完成了内存sdram控制器的控制通路和数据通路设计。
Video data stream is stored into SDRAM via It's controller.
视频数据流通过该控制器接收，然后存入片外sdram中。
The paper introduces the application of SDRAM and its general controller based on FPGA in the PDP video storage system.
介绍了SDRAM及其基于FPGA的通用控制器在PD P视频存储系统中的应用。
Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.
参数表模块主要实现SDRAM存储器的控制器接口，用于图像处理时读取参数信息。
The controller is used to translate requests coming from host port because DDR2 SDRAM could not execute these com- mands directly.
DDR2内存不能直接识别主端口的请求命令，必须经由内存控制器处理后才能执行。
Controller is calculated for the standard the memory DDR2 SDRAM and allows the possibility of programming latency.
控制器的计算标准内存的DDR2SDRAM，并允许的可能性，方案延迟。
The design scheme which USES FPGA as the main controller is presented in detail, including the internal interface of SDRAM, process of data transmission and realization of ping-pong operation.
详细介绍了以FPGA为主控器的设计方案，包括SDRAM内部接口设计、数据传输过程以及乒乓操作的实现方法。
The design scheme which USES FPGA as the main controller is presented in detail, including the internal interface of SDRAM, process of data transmission and realization of ping-pong operation.
详细介绍了以FPGA为主控器的设计方案，包括SDRAM内部接口设计、数据传输过程以及乒乓操作的实现方法。
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