After producing X-2 processor, preliminary testing shows that the design of DDR2 SDRAM controller is correct and its performance suits the assumption.
X-2处理器投片生产后,对样片的初步测试表明,所设计实现的DDR2内存控制器功能正确,性能指标达到预先设定的目标。
参考来源 - 高带宽低延时的DDR2内存控制器的研究与实现·2,447,543篇论文数据，部分数据来源于NoteExpress
A simple, modular, extensible and portable SDRAM controller program is proposed.
提出一种简便、模块化、易扩展和可移植的SDRAM控制器方案。
While its time sequence and access mechanisms are very complex, it is necessary to design SDRAM controller to improve the efficiency of accessing.
但SDRAM的控制时序和机制较复杂，因此需要设计sdram控制器以提高其读写效率。
We design a simple SDRAM controller in FPGA to interface with SDRAM, its main tasks are initialization, periodic refreshing, continuous reading and writing.
并在FPGA中实现了一个简化的SDRAM控制器，用以完成对SDRAM的初始化、定时刷新、连续读写等功能。
应用推荐