On a single integrated circuit, multiple chips, Shared memory, and an interconnect form a tightly integrated core for multiprocessing (see Figure 4).
在一个集成电路中，多个芯片、共享内存以及互连形成了一个紧密集成的多处理核心(参见图4)。
Each pod has its own processors and memory, and is connected to the larger system through a cache-coherent interconnect bus.
每个pod具有自己的处理器和内存，并通过一条高速缓存一致性互连总线(cache - coherent interconnect bus)连接到较大的系统。
The eight-socket rackmount RX900 S1, based on the Intel Xeon 7500 and QuickPath Interconnect, scales up to 64 processing cores, 2 TB of main memory and more than 120 GB of aggregated I/O bandwidth.
RX900S1是一款配有8个插槽的机架服务器，基于Intel至强7500平台和QuickPath互联技术。该服务器拥有64个处理器核，2TB主内容以及超过120GB的I/O带宽。
In this embodiment, half of the graphics bandwidth comes from memory local to the graphics processor and half comes from system memory over interconnect 700.
在这个实施例中，图形带宽的一半来自图形处理器本地的存储器，以及另一半通过互连700来自系统存储器。
In this embodiment, graphics local memory has a direct interconnect to this integrated chip.
在这个实施例中，图形本地存储器具有到这个集成芯片的直接互连。
Thus, in this example embodiment, two thirds of the graphics bandwidth comes from memory local to the graphics processor and one third comes from system memory over interconnect 900.
因此，在这个示例实施例中，三分之二的带宽来自图形处理器本地的存储器，以及三分之一通过互连900来自系统存储器。
Thus, in this example embodiment, three quarters of the graphics bandwidth comes from memory local to the graphics processor and one quarter comes from system memory over interconnect 800.
在这个示例实施例中，四分之三的带宽来自图形处理器本地的存储器，以及四分之一通过互连800来自系统存储器。
This configuration is not optimal for graphics memory performance because interconnect 110 is the only link between graphics processor 112 and system memory 108.
这种配置对于图形存储器性能不是最佳的，因为互连110足图形处理器112与系统存储器108之间的唯一链路。
In this embodiment, system memory controller 402 is integrated on the central processor 400 to provide access to system memory 404 through interconnect 406.
在这个实施例中，系统存储控制器402集成到中央处理器400上，以便提供通过互连406对系统存储器404的访问。
In one embodiment, graphics local memory controller is also integrated on chipset 408 to provide access to graphics local memory 416 through interconnect 418.
在一个实施例中，图形本地存储控制器也集成到芯片组408上，以便提供通过互连418对图形本地存储器416的访问。
System memory controller 106, integrated on chipset 102 in one embodiment, provides central processor 100 access to the system memory subsystem 108 through interconnect 110.
在一个实施例中，集成到芯片组102上的系统存储控制器106对中央处理器100提供通过互连110对系统存储器子系统108的访问。
The goal of REMOCA is to reduce disk access, which is much slower than transferring memory pages over modern interconnect networks.
由于网络传输延迟远远小于磁盘访问， 用网络传输代替磁盘访问就能够有效地降低虚拟机的平均磁盘访问延迟。
The goal of REMOCA is to reduce disk access, which is much slower than transferring memory pages over modern interconnect networks.
由于网络传输延迟远远小于磁盘访问， 用网络传输代替磁盘访问就能够有效地降低虚拟机的平均磁盘访问延迟。
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