computer memory interconnect 计算器内存互连
Memory Distributed Interconnect 中的内存分布互连技术 ; 内存分布互连技术
memory centric interconnect mechanism 以存储器为中心的互连机制
On a single integrated circuit, multiple chips, Shared memory, and an interconnect form a tightly integrated core for multiprocessing (see Figure 4).
在一个集成电路中，多个芯片、共享内存以及互连形成了一个紧密集成的多处理核心(参见图4)。
Each pod has its own processors and memory, and is connected to the larger system through a cache-coherent interconnect bus.
每个pod具有自己的处理器和内存，并通过一条高速缓存一致性互连总线(cache - coherent interconnect bus)连接到较大的系统。
The eight-socket rackmount RX900 S1, based on the Intel Xeon 7500 and QuickPath Interconnect, scales up to 64 processing cores, 2 TB of main memory and more than 120 GB of aggregated I/O bandwidth.
RX900 S1是一款配有8个插槽的机架服务器，基于Intel至强7500平台和QuickPath互联技术。 该服务器拥有64个处理器核，2TB主内容以及超过120GB的I/O带宽。
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