The models, however, take up very little space in memory: a cell phone could hold thousands of them.
然而，模型只在内存中占用了非常小的一块地方：一个手机可以加载成千上万个模型。
A computer memory cell ordinarily stores either a zero or a one, but a newly demonstrated example could also store a two or a three.
通常计算机的存储单元能存储0或1，但是一项新的研究证明了能够存储2或3。
Its memory cell survival time is longer.
其记忆细胞存活的时间则更长。
The memory cell keeps better antibodies of the antibody population.
记忆单元保存抗体群中亲和力较高的抗体。
What sequence of events do you think would be required to move the contents of one memory cell in a computer to another memory cell?
你认为要搬移某记忆体单元的内容至另一记忆体单元需要哪些一连串的事件来完成？
While the clonal selection principle is responsible for generating the memory cell population, the immune network theory prevents the population size from increasing quickly.
克隆选择用来产生抗原的记忆细胞群体，免疫网络理论则用来抑制该群体规模的快速增长。
The generation mechanism of stress induced leakage current (SILC) in flash memory cell is studied by experiments.
通过实验研究了闪速存储器存储单元中应力诱生漏电流(ILC)产生机理。
In this paper, study two immune memory models: memory cell and residual antigen.
文中详细研究了两种免疫记忆模型：记忆细胞模型和残余抗原模型。
NROM memory cell, memory array, related devices and methods.
NROM存储器元件，存储器阵列，相关装置和方法。
The resistive memory cell comprises a first gate, a second gate, a common doped region, a contact plug, a bit line and a resistive memory element.
所述电阻式存储器单元包括第一栅极、第二栅极、共用掺杂区域、接触窗插塞、位线以及电阻式存储器元件。
The invention is directed to a resistive memory cell on a substrate and a resistive memory array.
本发明公开了一种位于基底上的电阻式存储器单元和电阻式存储器阵列。
In this algorithm, the data set to be analyzed is taken as the invading antigen and the memory cell generated ACTS as the initial cluster center.
算法中，待分析的数据被视为入侵性抗原，产生的记忆细胞作为聚类分析的初始中心。
The refresh portion reads and rewrites data from and in the memory cell in a power-down state.
而且，更新部在电源下降时对存储器单元进行读出及重新写入。
A memory capable of preventing a memory cell from disappearance of data resulting from accumulated disturbances is obtained.
由此，可以得到能够抑制由积累的干扰而导 致的存储器单元的数据消失的存储器。
This memory comprises a nonvolatile memory cell and a refresh portion for rewriting data in the memory cell.
该存储器备有：非易失性的存储器单元和对存储器单元进行重新写入用的更新部。
The invention also discloses a reading and coding method of above OTP memory cell.
本发明还公 开了上述OTP存储器单元的读取和编程方法。
One of the main difficulties of quantum computation is that decoherence destroys the information in a quantum computer memory cell.
量子计算机存储单元的相干脱散，破坏量子态中的信息，是量子计算机难以实现的主要原因之一。
The invention discloses a memory cell array arranged multiple in rows and lines.
本发明公开了存储器单元阵列，以多行与多列排列。
The advantage thereof is to reduce size of the memory cell, reduce programming interference, with paged erasing function.
本发明的优点在于减少存储器单元的大小、减低编程扰动、以及按页擦除的能力。
Such integrated circuit includes a memory cell with a diode and an antifuse in communication with the diode.
所述集成电路包括具有二极管及与所述二极管连通的反熔丝的存储器单元。
By increasing net positive charges on the memory cell, it erases the memory cell and by increasing net negative charges on the memory cell, programs the memory cell.
通过增加存储器单元上的净正电荷以擦除存储器单元，而通过增加存储器单元上的净负电荷以编程存储器单元。
The invention operates a memory cell with charge capturing structure by measuring the current between substrate region and at least one of the source and drain regions of the memory cell.
通过在存储器单元的衬底区域与存储器单元的源极区域及存储 器单元的漏极区域中至少一个之间测量电流，来操作一种具有电荷捕 捉结构的存储器单元。
The invention reduces the size of the memory cell and ensures normal operation of the memory cell.
本发明能缩小存储单元的尺寸，并且保证存储单元能正常工作。
The invention provides a memory cell and manufacturing method thereof.
本发明公开了一种存储单元及其制造方法。
Memory cell capacitance is the crucial parameter which determines the sensing signal voltage, speed, data retention times, endurance and against the soft error event.
记忆体电容是决定检测讯号电压、速度、资料保存时间、耐久性以及防止软性误差的重要参数。
In this paper, two kinds of standards CMOS technology memory cell structure are introduced.
本文提出了两种基于标准CMOS工艺的存储单元结构。
In this paper, two kinds of standards CMOS technology memory cell structure are introduced.
本文提出了两种基于标准CMOS工艺的存储单元结构。
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