In the screen shots below, taken from a current build of Windows 8, it is now easy to see all the logical processors at a glance and know which are being utilized to high and low capacity.
在下面的屏幕截图，从目前最新的Windows8上建立的，它是现在可以很容易的了解所有逻辑处理器，并知道它们正在被利用高，低能力情况。
It is desirable to keep the logical model as free as possible from low-level detail — essentially "implementation free."
将逻辑模型尽可能地摆脱低层细节——本质上是“摆脱实现”——是令人想要的。
According to the technology of direct digital synthesis(DDS), a kind of low frequence signal source was introduced based on the Complex Programmed Logical Device(CPLD)and Single Chip Micyoco(SCM).
介绍了一种应用直接数字频率综合器（DDS）技术，基于可编程逻辑器件（CPLD）和单片机设计的低频信号源。
The ability to precisely control pressure switching and pressure monitoring functions make the Model 91 the logical choice in dead end or low flow applications such as precision control loops.
能够精确地控制压力开关，压力监控功能使示范91在死胡同，或如精密控制回路低流量应用的合理选择。
This protocol provides low delay and low overhead by using segmentation and reassembly and by combining information from different logical channels in a single packet.
本协议通过使用分割与重新装配并通过在单一信息包中组合来自不同逻辑信道的信息来提供低延迟和低开销。
Its biggest advanced and logical structure, reliable sealing performance, convenient dismantling and repair, stable operation, low noise and long lift.
它的最大优点是结构先进合理、密封性能严密可靠、拆卸检修方便、工作稳定、噪声低、使用寿命长。
This paper introduces a method of constructing a low-voltage PLC network based on logical topological structure, amd discusses its algorithm and simulation.
文章提出了一种基于“逻辑拓扑结构”组网的低压电力线载波通信组网方法，描述了建立该结构的算法，并进行了实验室仿真。
This paper introduces a method of constructing a low-voltage PLC network based on logical topological structure, amd discusses its algorithm and simulation.
文章提出了一种基于“逻辑拓扑结构”组网的低压电力线载波通信组网方法，描述了建立该结构的算法，并进行了实验室仿真。
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