Delay line is a key component of IC test system.
延迟线是集成电路测试系统的关键部件。
This paper introduces the verification method of ASL3000 IC test system.
介绍了ASL3000集成电路测试系统的检定方法。
Calibration of IC test system is critical to the precision and reliability of IC test results.
集成电路测试系统的校准关系到集成电路测试结果的准确性和可靠性。
Digital IC test content includes logic functional test, test of DC parameters and test of AC parameters.
数字集成电路测试内容包括逻辑功能测试、直流参数测试和交流参数测试。
It's very important for industrial use to fast test the parameters of IC in automatic test equipment (ATE).
在工业界中使用的IC自动测试系统(ate)，必须具有快速测试IC参数的特点。
DC parameters test is an important method of IC test. It is one of the key means to ensure the performances and qualities of IC.
直流参数测试是集成电路测试的一种重要方法，是保证集成电路性能、质量的关键手段之一。
In order to reduce the volume of IC test data, an index coding compression scheme based on test data partition merging is proposed.
为降低集成电路的测试数据量，提出一种分组合并的索引编码压缩方案。
IC test is the most important method to ensure the product quality. It is a difficult problem to test the complicated VLSI such as MCU.
集成电路测试是保证产品质量的重要手段，如何检测MCU类复杂大规模集成电路是测试的难点。
A very brief summary of the process of IC test and the technology of IC test in this paper. Also the automate test system is introduced in the paper.
该文从集成电路测试的过程概述性地介绍了集成电路的测试技术和集成电路的自动测试系统。
The research of IC test system is a key part of IC test industry and the research and production of a sophisticated test system is of great importance.
集成电路测试系统的研发是集成电路测试产业的重要组成部分，研发和制造高水平的集成电路测试系统具有十分重要的意义。
The top metal test pad, special test mode and BIST are adopted in the IC circuits to solve the IC test problem about the chip function test and electric character test.
通过添加测试引脚、设计专用测试模式，内建自测试等方法有效的解决了该芯片电路的功能测试和电气性能测试。
In the experiments, the fault type of IC test bus, the fault diagnosis flow and the test principles were analyzed, and a fault diagnosis strategy of test bus was proposed.
实验中分析了IC故障类型、一般故障诊断流程和进行扫描链本身完整性测试的方案，并提出了一种外加测试码向量生成的算法。
DC parametric testing is an important component of IC test, it has got more attention from IC test industry, because it could detect the performance of the IC quickly and efficiently.
直流参数测试是集成电路测试技术的重要组成部分，能够快速有效的检测芯片的性能，受到集成电路测试行业的高度重视。
How to test the analogue and mixed-signal circuits has become very critical to the IC testing, a novel fault diagnosis method based on current testing is proposed for mixed-signal circuits.
针对集成电路测试中模拟和混合电路的测试问题，提出了一种基于小波分析的电流测试实现混合信号电路故障诊断的方法。
Due to the diversity of the faults and manufacturing defects in CMOS IC, some of the faults can neither be defected by voltage test nor by IDDQ test.
由于CMOS集成电路中的故障和制造缺陷是多种多样的，其中有些故障既不能被电压测试也不能被稳态电流测试方法检测出来。
The paper mainly dwells on the common failure modes and the IC accelerating life span test theory and technology.
本文主要论述集成电路加速寿命测试理论方法和IC常见失效模式。
The IC approach switches are used as test elements, making the signal collection highly sensitive and well jam-resistant and prolonging its service life.
采用集成电路接近开关作为检测元件，使得信号采集具有较高灵敏度、较好的抗干扰性和较长的使用寿命。
This paper introduces the principles and methods of the test and diagnosis of digital IC, using 8098 Single chip Computer and other interface Chips.
介绍了利用8098单片机和其它接口芯片，实现对数字集成电路进行测试诊断的原理和方法。
As an IEEE test standard, JTAG is accepted and used by many IC design companies and manufacturers.
JTAG作为测试标准已为芯片设计与制造厂商接受和应用。
Therefore, how to solve the test problem of excessively high costs to implement efficient testing of the IC become extremely important.
因此，如何解决测试成本过高，并且实现对集成电路高效测试的问题将变得尤为重要。
With the help of IC back-end tools, this generator could implement the checking and verifying of the generated test structures layout files.
生成器配合集成电路后端设计开发环境，可以对所生成的测试结构版图文件进行检查与验证。
The company ' s primary business is IC component packaging and test and memory module assembly.
公司的主要业务是集成电路封装测试和内存模块装配。
IC manufacturers' const testing increases to more high, especially in the establishment of a large-scale chip of the test structure of time and labor costs.
集成电路制造商在测试上的成本也越来越高，尤其是在建立大规模的测试版图时的时间成本与人力成本。
The test circuit receives the second clock signal and the first clock signal outputted by the first IC chip to generate a comparable signal.
检测电路接收第二时钟讯号和第一集成电路芯片所输出的第一时钟讯号，以产生一比较讯号。
So our job is trying to verify and test complex IC so that shorten develop period.
如何对复杂芯片进行验证和测试，已经成为缩短总体产品时间所需要面对的挑战。
Provide Software Help to test and debug IC.
为IC的测试与及调试提供软件协助。
Users can input the identification information by keyboard or IC card, and the monitor of test controller can display them, and tell users how to do in next step.
测试者可以通过键盘或者IC卡输入身份信息，测试控制器的液晶显示器会显示测试者的身份信息，提示测试者如何进行下一步测试，操作错误的话还可以返回重新进行测试。
Through comparisons with the test results of 45 beams, this method is shown to provide accurate predictions of IC debonding failures.
分析结果表明，本文提出的计算模型与试验结果吻合良好，可以真实模拟受弯剥离破坏过程。
The sampling test results of the proposed scheme are presented and analyzed. The dynam IC simulation test results for the developed GPS based current differential relay are also introduced.
对该方案的同步采样试验结果和所开发的基于GPS的电流差动保护装置的动模试验结果进行了介绍和分析。
The sampling test results of the proposed scheme are presented and analyzed. The dynam IC simulation test results for the developed GPS based current differential relay are also introduced.
对该方案的同步采样试验结果和所开发的基于GPS的电流差动保护装置的动模试验结果进行了介绍和分析。
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