Effects of some key design parameters on the performance of the ESD protection circuit are discussed and physically explained.
讨论了一些重要的设计参数对ESD保护电路性能的影响并进行了物理上的解释。
A simulation method for ESD protection structure is presented in the paper by utilizing lumped-parameter circuit.
文章提出了一种通过集总参数电路对ESD保护结构进行模拟的方法。
Three common power bus ESD protection structures in CMOS IC were discussed, the circuit structure and working theories were analyzed, an improved power bus ESD protection structure was put forward.
讨论了三种常见的CMOS集成电路电源总线esd保护结构，分析了其电路结构、工作原理和存在的问题，进而提出了一种改进的ESD保护电源总线拓扑结构。
An ESD protection circuit for IC CARDS is described, which is based on CMOS process.
介绍了ESD保护结构的基本原理，并提出一个基于CMOS工艺用于IC卡芯片的保护电路。
Four modules are included in the SPDT analog switch, for example, MOS switch circuit, driver circuit, buffer circuit, and ESD protection circuit.
单刀双掷模拟开关电路的设计包括四个模块：MOS开关电路、驱动电路、缓冲电路和ESD保护电路。
Taking into consideration of ESD, the guard ring is adopted to isolate resistors and capacitors, thus to eliminate the influence in the main circuit by them.
出于ESD考虑，在输入输出采用保护电路：采用保护环隔离电阻电容，减小其对核心电路的影响。
Electrostatic discharge (ESD) is a very important technology for the interference caused in the circuit in electronic anti jamming technology.
静电放电(esd)对于电路引起的干扰是电子抗干扰技术中十分重要的一项。
The invention relates to an arrangement for improving the ESD protection in an integrated circuit.
本发明涉及一种设备，用于改善集成电路中的ESD保护。
The discharge circuit is operable to discharge the ESD pulse to the pad, to ground (203).
放电电路可操作用于将到焊盘的esd脉冲放电至地(203)。
A dynamic gate floating ESD protection circuit is first analyzed and then designed according to the whole-chip ESD planning.
本文研究了一种基于动态栅极悬浮技术的ESD保护电路，并根据全芯片ESD防护的要求设计了试验电路。
An ESD protection structure formed with lateral SCR is proposed. Equivalent circuit and layout are also given.
文章采用横向晶闸管设计ESD保护电路结构，给出了保护结构的版图以及等效电路。
Then, the paper elaborates the design principles of RF front-end circuit, including high efficient rectifier, modulation circuit, demodulation circuit and ESD protection.
然后本文详细阐述了射频前端电路设计原理及过程，包括高效倍压整流电路、调制电路、解调电路和ESD保护电路。
So the given ESD protection circuit using transistor delay can be well applied to VDD-to-VSS ESD protection in CMOS IC.
该保护电路不会导通。因此这种利用晶体管延时的保护电路完全可以作为CMOS集成电路电源和地之间的ESD保护电路。
The experiments show that the data in trigger will be changed when the circuit board is acted by ESD EMP.
实验表明，该电路板在ESDEMP作用下，触发器的存贮数据会发生改变。
The experiments show that communication error and controlling state changes would occur when the interface circuit is affected by ESD EMP.
实验表明，该接口板在ESDEMP作用下，会出现通讯出错和控制状态改变等现象。
The key problem originates from the complex interaction between the ESD protection circuitry and the core RF IC circuit under protection.
产生这一挑战的关键原因在于ESD保护电路和被保护的RFIC核电路之间存在着不可避免的复杂交互影响效应。
It shows that the problem of latent failure exists for MOS circuit after the ESD stresses imposed on it.
研究了低电压的静电放电(esd)对微电子器件造成的事件相关潜在性失效。
It shows that the problem of latent failure exists for MOS circuit after the ESD stresses imposed on it.
研究了低电压的静电放电(esd)对微电子器件造成的潜在性失效。
Choosing the Best ESD network for the RF Circuit and...
半导体器件与集成电路抗静电放电(esd)。
Choosing the Best ESD network for the RF Circuit and...
半导体器件与集成电路抗静电放电(esd)。
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