The design problem of an embedded RISC architecture in parallel processing of algorithm level, instruction level and process level is discussed in this paper.
本文将从算法级并行处理、指令级并行处理与进程级并行处理等三个方面讨论嵌入式RISC体系结构的设计问题。
According to three aspects: data types, instruction formats, and instruction set, the architecture of an embedded 32 bit RISC microprocessor is introduced in this paper.
本文从数据类型、指令格式与指令集合三个方面介绍一种嵌入式32位RISC微计算机的体系结构。
ARM embedded processor is a high performance, low - power RISC chips.
ARM嵌入式处理器是一种高性能、低功耗的RISC芯片。
However, due to the limitation of embedded chips, it is impossible to complete the whole process of software development on RISC chips.
但由于嵌入式芯片性能的局限性，无法在RISC芯片上完成整个软件开发过程。
From the ARM Architecture, we could see that RISC has so many merits in embedded systems. And in the new trend, embedded processors will be widely used in SOC (system On Chip).
同时从ARM体系，我们也可以看到RISC在嵌入式处理器领域的优势所在，以及它们将来必然在SOC(系统芯片)中获得广泛应用。
ARM is 32 bits RISC processor, high performance, low consumption are its remarkable characteristic, have already widely used in various kinds of embedded fields.
ARM是32位的RISC处理器，高性能、低功耗是其显著特点，已被广泛应用于各种嵌入式领域。
ARM is 32 bits RISC processor, high performance, low consumption are its remarkable characteristic, have already widely used in various kinds of embedded fields.
ARM是32位的RISC处理器，高性能、低功耗是其显著特点，已被广泛应用于各种嵌入式领域。
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