This thesis is an investigation into the logic circuit low-power design, embedded RISC core design and its low-power research.
本文对逻辑电路层次低功耗设计、嵌入式RISC处理器设计及其低功耗研究进行了深入研究。
参考来源 - 低功耗逻辑电路设计及在RISC设计中的研究·2,447,543篇论文数据，部分数据来源于NoteExpress
The design problem of an embedded RISC architecture in parallel processing of algorithm level, instruction level and process level is discussed in this paper.
本文将从算法级并行处理、指令级并行处理与进程级并行处理等三个方面讨论嵌入式RISC体系结构的设计问题。
According to three aspects: data types, instruction formats, and instruction set, the architecture of an embedded 32 bit RISC microprocessor is introduced in this paper.
本文从数据类型、指令格式与指令集合三个方面介绍一种嵌入式32位RISC微计算机的体系结构。
ARM embedded processor is a high performance, low - power RISC chips.
ARM嵌入式处理器是一种高性能、低功耗的RISC芯片。
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