所有内部锁存寄存器是由31位串行移位寄存器加载。
All the internal latched registers are loaded by a 31-bit shift register.
使用二进制表示法，在每个26位串行加法器动产位的杠杆转换成一个钟摆在摆动的时钟可见符号。
Using binary notation, 26 movable bit levers inside each bit serial adder convert the swing from the pendulum into a visible notation on the clock.
本文对7位串行码数字锁系统这一逻辑命题进行了实施方案的探讨和实验，证明用这种方法设计的系统结构简单实用。
The implementation scheme of digital latch system with 7 bit serial code is discussed and tested. The obtained results show the structure of system designed by this method is simple and practical.
介绍12位串行DACMAX538在锂电池检测设备中的应用给出了串行DAC与80C196CPU的接口电路及其C语言实现。
The application of 12 serial DAC MAX538s in lithium battery measure; the interface circuit and its Clanguage program of serial DAC and 80C196CPU.
接口的波特率为31.25 k波特，其中包括1个起始位，8个数据位以及1个停止位，每个串行比特周期为320微妙。
The baud rate for the interface is 31.25 Kbaud with 1 start bit, 8 data bits, and 1 stop bit, giving a period of 320 microseconds per serialized byte.
模块中主要分为两部分，第一部分由AD574A芯片和两个多路开关CD4051实现16路12位A/D转换，完成串行数据的采集；
The first part realizes the collection of the serial data by the AD574A and two CD4051 carrying out the 16-Channal 12-Bit A/D transition.
本文给出了8n位二进制数串行通讯扩展接口板的设计。
This paper presents the design of extended interface in serial communication with 8n-bit binary number.
设置与控制的编程利用3位SPI兼容串行接口来完成。
Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.
在FPGA读取视频信息后，先用位面分层技术把串行视频信息转换为并行数据再送到视频电缆上。
After video information read by FPGA, serial video information is transformed into parallel format by Bit-Plane Separation technology first, and then sent to video cable.
简述了以串行方式输入8位数字信号、最大可控电流为2A的数控恒流器件的设计思想和性能。
This paper presented the design thoughts and character of digital control current regulators, using 8bit digital signal of DAC serial input data and about 2a supreme output current.
这些状态位含有一个码序列，可用来确认串行传输的有效性。
These status bits contain a pattern sequence that can be used to confirm the validity of the serial transfer.
DOUT引脚的串行数据流有一个通道识别位和一个模式识别位，可提供所转换通道和当前工作模式的相关信息。
The serial data stream from the DOUT pin has a channel identifier bit and a mode identifier bit, which provide information about the channel converted and the current mode of operation.
它内置一个低功耗、高速、16位不失码的采样adc、一个内部转换时钟和一个多功能串行接口。
It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port.
该器件内置一个高速18位采样ADC、一个内部转换时钟、一个内部基准电压缓冲、纠错电路，以及串行和并行系统接口。
The part contains a high-speed 18-bit samplingADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports.
这是一个ST7920液晶的串行数据发送程序如果需要发送地址的话就改动rs位为1。
This a LCD Driver serial data if this procedure addresses this need in the case of changes to the RS-1.
串行推入总线125可以不宽于10位并且以较低的采样率运行。
The serial push bus 125 May not be more than 10 bits wide and runs a low sampling rate.
文中介绍8位专用单片机SH58216的异步串行接口(UART)在电子辞典系统开发中的实际应用。
This paper the application of the ASIC microcontroller SH58216 'a subsystem UART in the Electronic Dictionary system is introduced.
变字长解码模块的核心是基于桶形移位器的并行解码结构，使用该结构的解码速度比一次一位的串行结构更快。
The serial structured decoder can decode one bit per cycle. Because the structure of UVLC(Universal Veriable Length Code) is fixed, "first one detector"is designed to decode UVLC.
它内置一个低功耗、高速、18位采样adc和一个多功能串行接口端口。
It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port.
设计了4位QSERL串行进位加法器(RCA)电路，和相应的CMOS电路进行了功耗比较。
QSERL 4 bit carry ripple adder (RCA) is designed and compared with static CMOS counterpart.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
多数机电串行设备如电传打字机所经常使用的一种传输技术。采用这种技术时，每个字符由一个起始位、干数据位和一个停止位三部分组成。
The technique used by most electromechanical serial? devices such as teletypewriters, with this technique, each character consists of three parts: a start bit, the data bits and a stop bit.
随着串行通讯进入更多应用领域，因此，在一些应用里，需要对通讯功能的报文识别位提出分配标准化的要求。
With the serial communication into more applications, so in some applications, the need for communication of message identification bit allocation proposed standardization requirements.
串行16位 DAC8550应用用户手册和调试成功的程序，C写的可以应用于任何编译环境。
Serial 16-bit DAC8550 successful application of the user manual and debug the program, C can be applied to any written compilation environment.
MAX72 19是一种串行接口的8位数码管显示驱动器。
MAX7219 is a serially interfaced, 8 digit LED display driver.
MAX72 19是一种串行接口的8位数码管显示驱动器。
MAX7219 is a serially interfaced, 8 digit LED display driver.
应用推荐