所有内部锁存寄存器是由31位串行移位寄存器加载。
All the internal latched registers are loaded by a 31-bit shift register.
本文对7位串行码数字锁系统这一逻辑命题进行了实施方案的探讨和实验，证明用这种方法设计的系统结构简单实用。
The implementation scheme of digital latch system with 7 bit serial code is discussed and tested. The obtained results show the structure of system designed by this method is simple and practical.
介绍12位串行DACMAX538在锂电池检测设备中的应用给出了串行DAC与80C196CPU的接口电路及其C语言实现。
The application of 12 serial DAC MAX538s in lithium battery measure; the interface circuit and its Clanguage program of serial DAC and 80C196CPU.
本文给出了8n位二进制数串行通讯扩展接口板的设计。
This paper presents the design of extended interface in serial communication with 8n-bit binary number.
在FPGA读取视频信息后，先用位面分层技术把串行视频信息转换为并行数据再送到视频电缆上。
After video information read by FPGA, serial video information is transformed into parallel format by Bit-Plane Separation technology first, and then sent to video cable.
设置与控制的编程利用3位SPI兼容串行接口来完成。
Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.
该器件内置一个高速18位采样ADC、一个内部转换时钟、一个内部基准电压缓冲、纠错电路，以及串行和并行系统接口。
The part contains a high-speed 18-bit samplingADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports.
这些状态位含有一个码序列，可用来确认串行传输的有效性。
These status bits contain a pattern sequence that can be used to confirm the validity of the serial transfer.
它内置一个低功耗、高速、18位采样adc和一个多功能串行接口端口。
It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port.
MAX72 19是一种串行接口的8位数码管显示驱动器。
MAX7219 is a serially interfaced, 8 digit LED display driver.
它内置一个低功耗、高速、16位不失码的采样adc、一个内部转换时钟和一个多功能串行接口。
It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port.
DOUT引脚的串行数据流有一个通道识别位和一个模式识别位，可提供所转换通道和当前工作模式的相关信息。
The serial data stream from the DOUT pin has a channel identifier bit and a mode identifier bit, which provide information about the channel converted and the current mode of operation.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
设计了4位QSERL串行进位加法器(RCA)电路，和相应的CMOS电路进行了功耗比较。
QSERL 4 bit carry ripple adder (RCA) is designed and compared with static CMOS counterpart.
设计了4位QSERL串行进位加法器(RCA)电路，和相应的CMOS电路进行了功耗比较。
QSERL 4 bit carry ripple adder (RCA) is designed and compared with static CMOS counterpart.
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