因此研究互连延时成为当今进行电路设计和工艺的重点。
Thus, the study of interconnection delay becomes more important for current circuit design and technology.
基于“有效电容”的概念提出了一种分析两相邻耦合r C互连延时的方法。
An approach for analyzing coupling rc interconnect delay based on "effective capacitance" is presented.
提出了用来评估深亚微米vlsi电路中rlc互连延时的一种新的解析延时模型。
This paper presented an innovative analytical delay model for RLC interconnects utilized in the estimation of interconnect delay for deep submicrometer VLSI circuits.
基于概率解释算法的原理，提出了一种考虑工艺波动的RLC互连延时统计模型，该模型使用了对数正态分布函数。
Based on the theory of the probability interpretation algorithm, a statistical model of RLC interconnect delay in the presence of process variations was put forward.
首先，文章讨论了静态时序分析中的伪路径问题以及路径敏化算法，分析了影响逻辑门和互连线延时的因素。
Firstly, false paths in static timing analysis and the algorithm to sensitize paths are presented, and then some factors affecting gates and interconnects delay are discussed.
相对而言，小漏电和短时间的延时是因为IC中的各个单个元件之间的短暂互连造成的。
Relatively little stray capacitance and short time delays are produced because of the short interconnections between the individual components in IC.
本文结合纳米级工艺下互连线特性，对互连串扰噪声与延时的相关问题进入了深入的研究探讨。
This paper makes a deep research and discussion for crosstalk noise and interconnect delay combined the interconnect lines characteristic in nanometer process.
延时与冲激响应有着密切的联系，本文采用系统冲激响应的低阶矩，基于双极点近似对互连的延时特性进行了研究。
Based on the two-pole approximation, low-order moments are used to analyze the delay characteristic of interconnection.
延时与冲激响应有着密切的联系，本文采用系统冲激响应的低阶矩，基于双极点近似对互连的延时特性进行了研究。
Based on the two-pole approximation, low-order moments are used to analyze the delay characteristic of interconnection.
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