... Emitter-coupled pair 发射极耦合对 Interconnection time delay 互连延时 Interdigitated structure 交互式结构 ...
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因此研究互连延时成为当今进行电路设计和工艺的重点。
Thus, the study of interconnection delay becomes more important for current circuit design and technology.
基于“有效电容”的概念提出了一种分析两相邻耦合r C互连延时的方法。
An approach for analyzing coupling rc interconnect delay based on "effective capacitance" is presented.
提出了用来评估深亚微米vlsi电路中rlc互连延时的一种新的解析延时模型。
This paper presented an innovative analytical delay model for RLC interconnects utilized in the estimation of interconnect delay for deep submicrometer VLSI circuits.
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