It is comprised of smaller revenue generating product lines such as digital light processing (DLP) projectors and reduced-instruction set computing (RISC) microprocessors.
The Brahma15 is a 21, 000 DMIP Quad-core ARMv7-A instruction set compatible multiprocessor. 32KB instruction and 32KB data caches per processor are backed by a shared 2MB L2 cache and feed the multi-issue, out-of-order superscalar 15-stage plus write back pipeline of the Brahma15.
This time, however, Intel wants to crack the graphics market by doing the one thing it does best: cranking out chips able to run the so-called x86 instruction set that powers the overwhelming majority of modern computers.
Why on the list: arm is the main designer of RISC (reduced instruction set computing) chips used in such battery-powered information appliances as handlheld PCs and mobile phones.
Though the classes are led by Duke professors, he said, "they're not taught the way we teach Duke courses" because they don't have a set meeting time, nor do they involve face-to-face instruction.