介绍了用FPGA实现先行进位单元阵列除法器的原理及方法。
The theory and method of precedent cellular arrays divider by means of FPGA are introduced.
本文介绍了一种用声光调制器、模拟除法器和自动锁相放大器来改进激光探针测试系统稳定性的方法。
This paper reports a technique used lor improving the stability of the laser probe consisting of an acoustooptic modulator, an analogue divider and an auto-lock-in amplifier.
为提高除法计算的速度，提出了新的基-16算法的高速除法器算法，并以专用集成电路设计方法实现。
In order to improve the speed of division, a novel algorithm of radix-16 high speed divider and its ASIC implementation are presented.
采用数字移位器替代传统的除法器，使得电路结构大大简化，而且在很大的倍频系数范围内都保持很好的稳定性。
Use a binary digital shifter replace the traditional divider in ADPLL, make the structure simple and keeps the loop gain constant when the frequency multiplication factor changes.
文中采用牛顿迭代法，通过对牛顿迭代初始值的优化及除法器的优化设计，在保证计算精度的前提下有效地降低了求模运算量，并已应用于实际雷达系统中。
In this paper, the calculations are decreased efficiently and the result has the same precision in calculation by optimizing the initial number of Newton method and design of divider.
在8块AN221E04芯片中实现模拟乘法器、求小求和以及除法等单元电路，由各单元电路组合成完整的控制器。
All cell circuits such as analog multiplier, seeking small and sum, divider were implemented on 8 AN221E04s, and then an intact controller was assembled with the cell circuits.
在8块AN221E04芯片中实现模拟乘法器、求小求和以及除法等单元电路，由各单元电路组合成完整的控制器。
All cell circuits such as analog multiplier, seeking small and sum, divider were implemented on 8 AN221E04s, and then an intact controller was assembled with the cell circuits.
应用推荐