本测高方法已应用于某型雷达信号处理机中，并取得良好效果。
This method has been used in a certain radar signal processor and gets a good effect.
在论文的最后，详细介绍了某型号雷达信号处理机的硬件设计及其FPGA设计。
The hardware and FPGA design of radar signal process equipment of some type is elaborated in the end of this paper.
在基于VME总线或CPCI总线的雷达信号处理机中，板与板之间的数据传输速率受限于总线的速率。
The data transfer rate between varied boards in radar signal processors based on VME or CPCI bus was limited by the bus rate.
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