本测高方法已应用于某型雷达信号处理机中，并取得良好效果。
This method has been used in a certain radar signal processor and gets a good effect.
在论文的最后，详细介绍了某型号雷达信号处理机的硬件设计及其FPGA设计。
The hardware and FPGA design of radar signal process equipment of some type is elaborated in the end of this paper.
在基于VME总线或CPCI总线的雷达信号处理机中，板与板之间的数据传输速率受限于总线的速率。
The data transfer rate between varied boards in radar signal processors based on VME or CPCI bus was limited by the bus rate.
本文雷达信号处理机的运算核心为ADSP-TS201，因此着重讨论了上述算法在DSP上的实现方法。
As the processing core of the radar signal processor is ADSP-TS201, the implementations of the algorithm on DSP chips are focus discussed.
通过在某雷达信号处理机实际工程中的应用表明：该方法算法实现简单，脉压性能好，完全能满足工程应用的要求。
It is proved that pulse compression performance is quite well by using this simple technique, and it meets the project's requirement very well.
本文的工作是在研究几种滤波算法的基础上提出了一种改进的自适应卡尔曼滤波，并采用DSP和FPGA等器件实现了某雷达信号处理机的数据处理部分。
This paper proposes an improved adaptive Kalman filter based on researching on these filter theories and using DSP and FPGA implement a radar data processing system.
结合一个通用的雷达信号处理机系统，针对并行雷达信号处理的数据主要为矩阵形式的复数数据的特点，讨论了系统中软件的基本数据结构的定义和实现问题。
This paper presents the design and achievement of a new data structure. The data structure is special for radar signal parallel processing based on a general radar signal processing system.
本文介绍了一种用于距离门脉冲多卜勒雷达的可编程序数字信号处理机。
A programmable digital signal processor for ranging gate pulse Doppler radar is presented.
在雷达系统中，信号处理机是核心部件之一，其性能参数及可靠性直接影响到雷达系统的性能。
Signal processor is the core components in a radar system, its performance specifications and reliability directly affect performance of radar system.
提出了一种脉冲多普勒雷达数字信号处理机机内测试方法。
A new method of built in self testing for pulse doppler radar digital signal processor was advanced.
介绍一种由高速数字信号处理器(DSP) ADSPTS101实现的雷达数字信号处理机。
This paper introduces using high speed digital signal processor (DSP) ADSP-TS101 to realize radar digital signal processor.
介绍了高分辨率合成孔径雷达实时信号处理机硬件结构和实时信号处理算法及流程。
The hardware structure and algorithm flow of real-time signal processor for UAV SAR is introduced in the paper.
但是，通用信号处理机的尺寸难以满足雷达小型化的要求，为了实现LFMCW雷达小型化，研制基于PCI总线的嵌入式信号处理机十分必要。
But the general signal processing system based on PCI bus can not meet the size demand of the LFMCW radar system miniaturization.
但是，通用信号处理机的尺寸难以满足雷达小型化的要求，为了实现LFMCW雷达小型化，研制基于PCI总线的嵌入式信号处理机十分必要。
But the general signal processing system based on PCI bus can not meet the size demand of the LFMCW radar system miniaturization.
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