逻辑时钟,可以是计算机、数字电路、机械结构密码机、CPU内部操作、声卡、显卡和各种系统等等内部操作的时钟,她的状态于时间基准有固定或可改变的规则。
... 逻辑时钟 Logic Clock ; Logical Clocks 逻辑时钟输出 CLK OUT 逻辑时钟脉冲产生器 logic clock pulse generator ...
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Analysis on the time sequence of KSEQ using the logical clock based formulization model shows that, the value of kenerl user shared data structures always conform to their logical definition.
使用基于逻辑时钟的形式化分析模型对KSEQ的时序分析表明,内核-用户共享数据结构的取值结果总是能够符合其逻辑定义。
参考来源 - SSL VPN中非对称隧道等若干关键技术的研究·2,447,543篇论文数据,部分数据来源于NoteExpress
提供了用于防止固件缺陷干扰逻辑时钟的计算机实现的方法和数据处理系统。
A computer implemented method and data processing system are provided for preventing firmware defects from disrupting logic clocks.
该文讨论了几种逻辑时钟系统和并行及分布式监测系统MS - 1中的物理时钟,并比较了它们的优缺点。
This article discusses several kinds of logical time systems, and also discusses the physical time system in our parallel and distributed monitor system MS-1.
首先讨论了逻辑时钟方法及逻辑时钟的修改算法,然后介绍了自行研制的分布式s4系统中逻辑时钟监控器模块的实现方法。
Firstly it discusses the approach of logical clock and revise algorithm of logical clock, then introduces the implementation approach of logical time monitor module in distributed S4 system.
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