但该技术在提高指令并行性的同时也增加了寄存器压力，而寄存器溢出技术正是解决寄存器压力的有效方法。

However, this technique also increases the register pressure while it takes advantage of the instruction-level parallelism, and the register spilling is an effective approach to solve this problem.

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多年来，处理器制造厂商在不断提高时钟速度和指令级并行性，因此单线程代码不需要修改就可在新的处理器上更快运行。

For years, processor makers consistently delivered increases in clock rates and instruction-level parallelism, so that single-threaded code executed faster on newer processors with no modification.

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VLIW DSP机器由于硬件控制简单，指令的并行性完全在编译时决定。因此编译程序成为基于VLIW DSP机器应用的关键因素。

VLIW DSP has simple control hardware, and its ILP is decided during the compile time, so compiler is the key factor in developing applications based on VLIW DSP.

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