但该技术在提高指令并行性的同时也增加了寄存器压力，而寄存器溢出技术正是解决寄存器压力的有效方法。
However, this technique also increases the register pressure while it takes advantage of the instruction-level parallelism, and the register spilling is an effective approach to solve this problem.
多年来，处理器制造厂商在不断提高时钟速度和指令级并行性，因此单线程代码不需要修改就可在新的处理器上更快运行。
For years, processor makers consistently delivered increases in clock rates and instruction-level parallelism, so that single-threaded code executed faster on newer processors with no modification.
VLIWDSP机器由于硬件控制简单，指令的并行性完全在编译时决定。因此编译程序成为基于VLIW DSP机器应用的关键因素。
VLIW DSP has simple control hardware, and its ILP is decided during the compile time, so compiler is the key factor in developing applications based on VLIW DSP.
投机优化技术作为一种先进的现代编译技术，有效地提高了指令执行的并行性。
Speculation is a very effective way to improve instruction level parallelism as an advance compiler optimization technique.
同时，结合计算机并行处理技术，利用MMX指令和SSE指令，对整个跟踪算法进行了并行性优化。
At the same time, integrating with computer parallel processing technology, the overall tracking algorithms are optimized by means of MMX and SSE instructions.
本文说明传统的并行技术可以有效地开发循环中的子字并行性，同时提出一种基于代价子图的子字并行指令自动识别的方法。
This paper shows that the traditional parallelization techniques can be used to exploit subword parallelism, and also proposes a novel method to extract subword parallelism based on the cost subgraph.
首先介绍了L SSIMD阵列微处理器的三种并行性：数据并行、流水线并行和指令的并行执行。
This paper firstly discusses three types of parallelism in LS SIMD array microprocessor, they are the concurrence of data, the pipelining and the operation in parallel.
软件流水是一种开发循环程序指令级并行性的技术，它通过并行执行连续的多个迭代来加快循环的执行速度。
Software pipelining is a loop scheduling technique which extracts instruction level parallelism by overlapping the execution of several consecutive iterations.
软件流水是一种开发循环程序指令级并行性的技术，它通过并行执行连续的多个迭代来加快循环的执行速度。
Software pipelining is a loop scheduling technique which extracts instruction level parallelism by overlapping the execution of several consecutive iterations.
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