存储单元和数据线用复位信号来控制，以使数据可在该半导体器件中被可靠地输出。
A memory cell and a data line are controlled with a reset signal, so that data can be reliably outputted in the semiconductor device.
当选择并且连接到用来读取的读取电路时，取消位线的复位状态并且通过所选的位线读取存储在所选存储器单元中的信息。
The reset state of a bit line is canceled when selected and connected to a read circuit for read, and information stored in a selected memory cell is read via the selected bit line.
本论文的嵌入式硬件环境，包括CPU的外围时钟电路，复位电路，存储器单元，LCD模块，触摸屏，键盘，FLASH，SDRAM，网络接口等部分。
The embedded system in this thesis include CPU , memory part , LCD part, touching screen, keyboard, FLASH, SDRAM and internet interface and so on.
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