We focus on the carrier synchronization method, the circuit and its parameters design, the performance simulation and the circuit implementation in Field Programmable Gate Array (FPGA).

重点研究载波同步方法，设计电路及参数，仿真同步性能，并在现场可编程门阵列(FPGA)上实现同步电路。

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In this paper a method of designing and implementing Field Programmable Gate Array (FPGA) digital modulator based on the improved Direct digital Synthesizer (DDS) technology is presented.

提出了一种基于改进直接数字频率合成(DDS)技术的现场可编程门阵列(FPGA)数字调制器设计与实现方法。

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The design method for the efficient time-varying network architecture of the fractional multiple sampling rate converter is presented and its field programmable gate array (FPGA) is implemented.

提出了分数倍抽样率转换器的高效时变网络结构的设计方法，并用现场可编程门阵列(FPGA)实现。

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