We focus on the carrier synchronization method, the circuit and its parameters design, the performance simulation and the circuit implementation in Field Programmable Gate Array (FPGA).
重点研究载波同步方法,设计电路及参数,仿真同步性能,并在现场可编程门阵列(FPGA)上实现同步电路。
In this paper a method of designing and implementing Field Programmable Gate Array (FPGA) digital modulator based on the improved Direct digital Synthesizer (DDS) technology is presented.
提出了一种基于改进直接数字频率合成(DDS)技术的现场可编程门阵列(FPGA)数字调制器设计与实现方法。
The design method for the efficient time-varying network architecture of the fractional multiple sampling rate converter is presented and its field programmable gate array (FPGA) is implemented.
提出了分数倍抽样率转换器的高效时变网络结构的设计方法,并用现场可编程门阵列(FPGA)实现。
The method was very suitable for hardware implementation based on FPGA (field programmable gate array).
该方法非常适于采用现场可编程门阵列(FPGA)器件的实现。
A new compilation method with performance-optimized dynamic compound macro (PODCM) library was proposed for fast compilation of field programmable gate array (FPGA).
针对现场可编程门阵列(FPGA)的快速编译问题,提出了基于性能优化的动态复合宏单元(PODCM)库的编译方法。
The embodiment of the invention discloses a method for realizing a field programmable gate array and a device thereof.
本发明实施例公开了一种现场可编程门阵列的实现方法和装置。
The method and technique to realize real-time histogram statistic were presented which use Altera s Cyclone II field programmable gate array (FPGA).
介绍了采用Altera公司的CycloneII系列现场可编程门阵列(FPGA)实现灰度直方图实时统计的实现方法和设计技巧。
The two-point correction method is analyzed, and a new real-time nonuniformity correction algorithm for IRFPA is proposed by using field programmable gate array(FPGA).
提出了一种以FPGA为核心的焦平面器件实时非均匀性校正方法,能够实时地完成非均匀性校正系数的在线计算、红外图像的非均匀性校正。
A new digital beam forming (DBF) method is proposed. It combines the parallel delay LMS (PDLMS) algorithm and the field programmable gate array (FPGA).
采用高并行度的并行延时最小均方(PDLMS)算法,用现场可编程门阵列(FPGA)实现自适应数字波束形成模块。
A detailed design method of "semi-custom" gate array and its result are presented in this paper.
本文详细地讲述了“半客户”式CMOS门阵列电路的设计过程。
A detailed design method of "semi-custom" gate array and its result are presented in this paper.
本文详细地讲述了“半客户”式CMOS门阵列电路的设计过程。
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