适用于飞利浦系列IIS总线芯片。
最后，在研究EP -H31580 1553总线芯片的基本功能和读写时序的基础上，完成了1553总线模块的硬件设计。
At last, 1553 bus circuit design has been finished on the basis of studying the basic function and timing of 1553 chip EP-H31580.
这是因为进程执行现在需要跨总线协调，以一半的芯片时钟频率进行处理。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
JW认为下一个十年将会兴起的另一个架构是，连接企业资源到云的网络是一个单芯片上的总线。
Another architecture, that JW sees coming in the next 10 years is the one where "the network connecting enterprise resources to the cloud is a bus on a single chip."
增强的总写架构-目前64位芯片上的总线架构比前几代更加的快也更加的广。
Enhanced bus architecture - The bus architecture on current 64-bit chipsets is faster and wider than earlier generations.
lspci - v给出每个连接到pci总线上的设备和芯片的详细信息。
Lspci -v gives detailed information about every device and chipset connected to the pci bus.
本文对于利用FPGA芯片进行系统设计的研究人员具有一定的参考价值，也可以作为LONWORKS现场总线智能节点开发的参考资料。
The paper maybe value to those who ready to use FPGA chips in their designs or be reference for development of neuron node based on LONWORKS field-bus technology.
并对PCI总线在氡室检测系统中的具体硬件系统结构、控制芯片与驱动软件设计，与PCI总线对核谱转换的传输性能作了阐述。
And the specific hardware system structure, control slug and the design of drive software and the transmission performance of PCI bus for nuclear spectrometry were also set forth.
论述了基于SJA1000的CAN总线的硬件接口电路的设计、芯片的选择、软件设计及CAN通信的实现。
The design of CAN bus hardware interface circuit based on SJA1000, the selection of chips, the design of software and the realization of CAN communication are expatiated.
维护485总线设备和有关芯片不受伤害。
然后将MCU芯片at89c51和SJA1000总线控制器结合，为实验平台设计了实时可靠的智能控制CAN节点。
Thirdly, combining MCU clip AT89C51 with bus controller SJA1000, an intelligent control CAN node for the experimental platform is designed.
本论文的主要工作即着重于系统芯片中片上总线结构的性能评价研究，包括总线结构的建模、系统仿真环境的建立以及性能评价的方法。
This paper focuses on performance estimation of the embedded microprocessor based on the on-chip bus, including on-chip bus modeling, high-level simulation environment building and their combination.
介绍了基于CAN总线的卷绕式镀膜机蒸镀系统的设计方法，阐述了系统设计的硬件及其芯片选用并介绍了软件设计方法。
This article presents the design of an evaporator system for use with winding plating equipment based on CAN bus, including its hardware structure chip choice and the design of software.
基于USB总线接口芯片CH375，设计了机车信号记录仪数据记录系统，并详细阐述了CH375与TMS320F 2812之间的接口设计。
Based on the USB bus interface chip CH375, we design the locomotive signals data recording system, and detail the design of communication interface of CH375 and TMS320F2812.
SPC 3是一种用于PROFIBUS - DP开放式工业现场总线智能化接口芯片。
SPC3 is a intelligence interface chip which is used in the open field bus PROFIBUS-DP.
其核心思想是将计算机网络技术移植到芯片设计中来，从体系结构上彻底解决总线架构带来的问题。
The core idea is to transplant the knowledge of network technology of computer into the design of chips such that systematically solves the problems due to bus architecture.
介绍了基于RS-485总线的单片机多机通信系统，重点介绍了MAX-487芯片和通信系统的组成，并给出了流程图。
The essay introduces multi-chip calculator communication system based on RS-485 bus, especially MAX-487 chip and the components of the communication system and gives the flow diagram.
因此研究开发基于PCI总线接口和通信协议的超大规模集成电路芯片是具有应用前景和市场价值的。
Therefore, it will have a bright future to develop VLSI chip based on a PCI bus and related a communication protocol.
文章介绍了一种采用PCI专用接口芯片pci9052作为PCI总线与DSP (TMS320 LF 2407)的接口桥接器，实现6轴运动控制卡的硬件设计方法。
In this article, to carry the 6-axis motion controller out, a method of using PCI special interface chip PCI9052 to be a interface bridge of PCI bus and DSP (TMS320LF2407), was introduced.
使用SPI串行总线可以达到MCU与语音芯片串行通信的目的。
With SPI serial bus to carry out the serial correspondence between MCU and voice chip.
FPGA作为控制器，经I2C总线对视频解码芯片SAA7111 A进行初始化。
FPGA as controller initialize video decode chip SAA7111A through I2C bus.
本文介绍了一种使用USB通用总线接口芯片CH371实现USB接口的硬件设计和软件实现方法。
This thesis introduces a hardware design and software implement method of USB port using CH371 which is a USB general interface chip.
双端口ram是一种特殊的数据存储芯片，利用双端口ram可以实现双高速单片机总线方式的数据共享。
The dual-ported RAM is a kind of special memory, and the bus data share between double high-speed microprocessors is carried out by using it.
分析了总线接口芯片选择原则和总线冲突解决方案，给出了系统实现的硬件接口电路和软件实现详细框图。
The selection principle of bus interface chip and solution of bus conflict are introduced, together with its concrete hardware circuits and software block chart are given.
论文的重点是在FPGA芯片上实现各个总线控制器以及相互之间的数据转换。
The paper focuses on realizing each field bus controller and the mutual data conversion on FPGA chips.
采集卡利用一种高集成度的USB转UART桥接器CP2101芯片实现了通用串行总线（USB）接口方式，可实现计算机外设的即插即用特性。
The board communicate with computer through the Universal Serial Bus(USB) by using CP2101, a highly-integrated USB-to-UART Bridfe Controller, which can realize Pcperpheral's plug & play.
采用软件模拟时序使CPU的I/O口模拟I2C总线，实现了单片机与时钟芯片、温湿度传感器、存储芯片等器件的数据交换。
With time series simulation software, the CPU's I/O ports simulate I2C bus and exchange data with clock chips, temperature humidity sensors, memory chips and other devices.
总线仲裁器模块广泛地应用于控制类芯片的各个领域。
Bus arbiter module is used in many fields of industry control.
介绍了USB总线接口芯片CH375，并在此基础上实现了PC与嵌入式医疗设备的USB通讯，给出了相关的程序代码。
This paper presents CH375 bus interface chips, the USB communication between PC and embedded medical equipment, and the relative procedure code.
介绍了一种基于新型USB接口芯片CH372的CAN总线网络适配器系统的设计，提出了一种使用USB接口实现CAN总线网络与计算机连接的方案。
This paper introduces a design of a CAN bus adapter system based on a new type of USB chip CH372 for the communication of the CAN bus and the computer.
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