提出了一种动目标检测雷达数字信号处理机内建自测试方法。
A new method of built-in self-testing for the digital signal processor in an MTD radar is proposed.
内建自测试作为一种新的可测性设计方法，能显著提高电路的可测性。
As a new method of design for testability build-in self-test can prominently improve the testability of the circuits.
模板是软件内建自测试系统的基石，其内容关系到整个系统的性能和效果。
Template is a cornerstone in the BIST for software, which affect the effectiveness and efficiency in software testing.
内建自测试(BIST)作为一种有效的测试技术可以大大地降低测试开销。
Built-in self-test (BIST) is used as an effective test technique and it can greatly reduce test overheads.
本文提出了一种基于算术加法生成器的测试或内建自测试的低功耗测试方法。
A low power test approach for test or built-in self-test based on arithmetic additive generator is proposed in this paper.
本文提出了采用模拟多路开关的模拟内建自测试电路abist的一种新结构。
This paper presents a new structure of analog Built - in Self - Test circuit (ABIST) consisting of analog multiplexers.
内建自测试(BIST)是一种有效降低测试开销的技术，在瞬态电流测试中得到了应用。
BIST has been applied into transient current testing as an effective method to reduce testing spending.
重新播种的测试方法是一种内建自测试方法，它可以用来提高伪随机测试矢量的故障覆盖率。
Reseeding is a built-in self-test (B. IST) testing method, which is used to improve fault coverage of pseudo-random testing.
文中详细分析了嵌入式存储器内建自测试的实现原理，并给出了存储器内建自测试的一种典型实现。
The principle of memory built-in self-test is analyzed in detail and a typical implementation of MBIST is given in the paper.
针对IP软核的测试、验证提出了面向测试、验证的IP软核设计方法—BIST内建自测试方法。
For the test and verification of soft-IP, the paper presents a solution of Design For test technique, of which the BIST (Built-in Self test) is described in particular.
本文提出了一种基于受控线性反馈移位寄存器（LFSR）进行内建自测试的结构及其测试矢量生成方法。
A new BIST structure with the method of test vector generation based on a controlled LFSR is proposed.
提出了一种在内建自测试(BIST)中进行部分扫描的算法，此算法综合了电路的结构分析和可测性分析。
A partial scan algorithm for BIST, which combines the structure analysis and testability analysis, is presented in this paper.
通过添加测试引脚、设计专用测试模式，内建自测试等方法有效的解决了该芯片电路的功能测试和电气性能测试。
The top metal test pad, special test mode and BIST are adopted in the IC circuits to solve the IC test problem about the chip function test and electric character test.
为压缩内建自测试(BIST)期间所需测试数据存储容量，提出了一种新的基于测试数据两维压缩的BIST方案。
To reduce the storage volume of the test data during the built-in self-test (BIST), a new BIST technique based on two dimensional compression of test data is presented.
与此同时，片上系统的测试问题也随之产生，基于边界扫描的内建自测试技术为片上系统的测试提供了新的解决方案。
Meanwhile the testing of SOC become more difficult and complex, Boundary-Scan-based Built-in-Test technology give a new solution.
另外，本文还针对IP核投片测试提出一种扫描测试电路结构，能够实现测试芯片的扫描测试和高速内建自测试(BIST)。
Moreover, a scan test circuit was proposed. This circuit can implement scan test and high speed build in self test (BIST) for IP core chip tests.
文中首先介绍了内建自测试的实现原理，在此基础上以八位行波进位加法器为例，详细介绍了组合电路内建自测试的设计过程。
The BIST of the principle of achieving is introduced first in this paper, then take the 8-bit ripple carry adder as an example, describes the design process of BIST.
在分析全扫描内建自测试(BIST)过高测试功耗原因的基础上，提出了一种选择部分寄存器成为扫描单元的部分扫描算法来实现低功耗BIST。
Based on the analysis of excessive power dissipation off ull-scan BIST, we present partial scan algorithm which selects a portion of registers for scan cells to implement low power BIST.
将以上研究思想应用于国家自然科学基金项目“软件可测性设计新概念—软件内建自测试”，实践证明，该模型有助于软件自动化测试的进一步研究。
Then it comes up with an arithmetic that will be used in regression testing according to the MRD model. This idea has been applied to the project "built-in self test for software…"
针对混合信号电路的测试问题，提出了一种内建自测试(BIST)结构，分析并给出了如何利用该结构来计算片上高速模数转换器(adc)的静态参数。
Aiming at the mixed-signal circuit testing, an integrated built-in self test (BIST) architecture for testing on-chip high speed ADC was presented.
本文在对目前主要的可测性设计方法进行研究的基础上，根据所设计CPU的结构特点，采用了边界扫描技术和基于BILBO的内建自测试技术结合的可测性设计方案。
Based on the research of primary DFT method and the structure characteristic of designed CPU, the article combines the boundary scan and Build-In Self-Test based on BILBO to test.
本文在对目前主要的可测性设计方法进行研究的基础上，根据所设计CPU的结构特点，采用了边界扫描技术和基于BILBO的内建自测试技术结合的可测性设计方案。
Based on the research of primary DFT method and the structure characteristic of designed CPU, the article combines the boundary scan and Build-In Self-Test based on BILBO to test.
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