The programmable logical device has big scale, quick working speed and is programmable which is extremely suitably used to realize DDS.
可编程逻辑器件具有器件规模大、工作速度快及可编程的硬件特点，非常适合用来实现DDS。
This paper mainly talks about designing the protocol layer of USB2.0 with the programmable logical device as the carrier through the VHDL language.
本文在此主要通过VHDL语言，利用可编程逻辑器件作为载体来设计usb2.0的协议处理层模块。
Based on a complicated programmable logical device (CPLD), a miniaturized universal pulse height analysis (PHA) module of high performance is realized.
介绍一种基于复杂可编程逻辑器件(CPLD)的通用高性能脉冲幅度分析(PHA)模块设计。
This system is made of Programmable Logical Controller and other assistant device.
整个系统是以可编程逻辑控制器为核心，辅以其它设备构成。
The way of data transfer in DMA mode, control method of logical programmable device and design of driver program are discussed to solve the key point of sequential transmission.
给出DMA工作方式下数据传输的设计方法，可编程逻辑器件的控制逻辑和驱动程序设计，解决了数据传输连续性的关键问题。
The way of data transfer in DMA mode, control method of logical programmable device and design of driver program are discussed to solve the key point of sequential transmission.
给出DMA工作方式下数据传输的设计方法，可编程逻辑器件的控制逻辑和驱动程序设计，解决了数据传输连续性的关键问题。
应用推荐