第一次测试生成的数据，如下所示。
这能减少在代码中测试生成进程的需要。
This reduces the requirement to test the spawning process in your code.
现在测试生成的消息流。
那些传统的测试生成算法已不再适用。
Those traditional test generation algorithms are not applicable any more.
与其他算法相比，测试生成效率明显提高。
The test generation efficiency is higher comparing with other algorithms.
然后就可以测试生成的客户端代码，确保一切都是按照需要运行。
You can then test the generated client code and ensure that everything is working as required.
研究了组合电路中非鲁棒性路径时滞故障的测试生成算法。
The test generation algorithm for non-robust path delay fault in combinational circuits is studied.
本文还针对异步时序电路测试生成问题进行了有益的研究。
In this dissertation, some beneficial researches on test pattern generation for asynchronous circuits are taken.
最后讨论了故障精简以及启发知识在测试生成中的应用问题。
Also, fault collapsing and heuristic information used in testing process are analysed.
下面，我们想使用JAX - WSJSPs来测试生成的应用程序。
Next, we want test the generated application using JAX-WS JSPs.
设想构建3是最初的ga候选，差不多80%的可用测试生成了好的结果。
Imagine that build 3 was an initial GA candidate, and almost 80% of the available tests were run producing good results.
当测试生成过程完成之后，测试集将在TestEditor视图中打开。
After the test generation process is complete, the test suite will open in the test Editor view.
针对特大规模组合电路和全扫描设计电路提出了一种高速测试生成方法。
This paper presents a high speed test generation method specifically for upper large scale combination circuit (ULSCC) and full scan designed circuit.
这仅仅是一些可能的异常，但根据硬件和数据库，您可以使用该测试生成的大量异常。
These are only some possible exceptions, but based on the hardware and database, you are using a wide variety of exceptions that can be produced by this test.
提出了一种基于MSC(消息序列图)测试目的的互操作性测试生成方法。
An interoperability test generation method based on MSC (message sequence charts) test purposes was presented.
然而，已有的电路并行测试生成算法并未取得理想的结果，尤其对时序电路。
However, the existing circuit parallel test generation algorithms fail get good results, especially for sequential circuit.
文章提出了一种基于通信多端口有限状态机模型的协议互操作性测试生成方法。
This paper presents an interoperability test generation method based on the formal model, Communicating Multiport Finite State Machines.
讨论了逻辑电路测试生成系统(简称TGS)中使用的一种模型数据及预处理方法。
A kind of model data and the preprocessing method for the logic circuit test generation system (TGS) are presented.
作为一个简单的示例，我试着使用两款知名的测试生成工具来为保龄球游戏程序生成测试代码。
As a simple example of this, I have tried to generate tests for the bowling game program using two of the better known test generation tools. The interface to the bowling game looks like this.
以组合电路的满足性测试生成算法为基础，提出了控制输入跟踪算法和测试衍生算法。
The paper proposes controlling input values tracing algorithm and test derivation algorithm based on test pattern generation using satisfiability.
提出一种用于测试组合电路中延迟故障的新功能故障模型，讨论该模型的功能测试生成。
This paper propose a functional fault for delay faults in combinational circuits and describe a functional test generation procedure based on this model.
低的覆盖率表明方法有问题，可能是测试生成技术需要改进，也可能需要给测试人员提供培训。
Low coverage indicates a process problem, which might require test generation technique to be improved, or training to be imparted to the tester.
另外本文还比较详细的分析比较了常用的存储器测试算法，简要分析了VLSI测试生成算法。
In addition, the detailed analysis of some frequently used memory test algorithms and brief analysis of some test generation algorithms for VLSI are also included in this paper.
基于无复位时序电路，详细研究了有复位状态的同步电路测试生成问题及在无复位电路中的应用。
In order to test the circuits that has not any reset state, special way for resolving start state is described.
故障模拟器是基于模拟算法的测试生成系统的重要组成部分，其性能优劣直接影响测试集的各项指标。
The fault simulator is an important part of a simulating based automatic test generating system, and its performance greatly affects the quality of the gained test vector set.
详细分析了固定故障所反映出的状态变换特征，提出状态变换故障模型以及相对应的测试生成压缩方法；
This paper describes state transition fault and collapsing of test generation basis of the character of fixed fault.
针对数字电路中多故障测试生成效率较低的问题，提出了基于神经网络的数字电路多故障测试生成算法。
A multiple faults test generation algorithm based neural networks for digital circuits is proposed considering that the test generation efficiency for multiple faults in digital circuits is low.
仿真结果表明，该方法操作简单、有效，故障覆盖率达到了90%，是一种很可行的存储器板测试生成方法。
The result indicates that the technology manipulates easily and is effective, the fault coverage reaches 90%, it is a feasible test generation technology.
仿真结果表明，该方法操作简单、有效，故障覆盖率达到了90%，是一种很可行的存储器板测试生成方法。
The result indicates that the technology manipulates easily and is effective, the fault coverage reaches 90%, it is a feasible test generation technology.
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