论述了静态存储单元电路对目前高速数字系统的意义。
The significance of the static random access cell for high-speed digital systems is discussed.
根据分析结果和现有工艺要求，设计了高可靠的静态存储单元。
To the result of analyze and the demand of process, the high reliable SRAM is presented.
在标志位控制下，用来存放超窄数据的高存储单元将被关闭，以节省其动态和静态功耗。
At the control of an additional flag bit, the higher bits of the data cells that store VNV are closed to save its dynamic and static power consumption.
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