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本文给出一种任意多位的保留进位阵列乘法器的自动设计方法。
This paper presents an automatic design method for a carry save array multiplier with arbitrary number of bits.
直接补码阵列乘法器的工作原理是《计算机组成原理》课程的难点。
The direct 2's complement array multiplier principle of work is "Computer Organization Principle" the curriculum difficulty.
传统的乘法器的设计，在最终的乘积项求和时，常采用阵列相加或叠代相加的方法，不适用中小规模的微处理器的设计。
In summing of the last product in the traditional multiplier design, the array or iteration summing method is used, which is not suitable to the design of small or middle scale integration circuit.
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